Patents by Inventor Riho Sasaki

Riho Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11677380
    Abstract: An acoustic wave device comprises a substrate including a piezoelectric material, and interdigital transducer (IDT) electrodes disposed on a surface of the substrate. The IDT electrodes have gap regions, edge regions, and center regions. A maximum width of the IDT electrodes in the gap regions is greater than the maximum width of the IDT electrodes in the edge regions, thereby achieving a velocity of an acoustic wave in the gap regions being greater than the velocity of the acoustic wave in the center regions, and the velocity of the acoustic wave in the center regions being greater than the velocity of the acoustic wave in the edge regions.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: June 13, 2023
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Joji Fujiwara, Riho Sasaki
  • Publication number: 20230101360
    Abstract: An acoustic wave device is disclosed. The acoustic waved device can be a shear horizontal mode surface acoustic wave device. The acoustic wave device can include a piezoelectric layer, an interdigital transducer electrode over the piezoelectric layer, and a temperature compensation layer over the interdigital transducer electrode. The piezoelectric layer can be a lithium niobate layer with a cut angle in a range of ?20° YX to 25° YX. The interdigital transducer electrode includes a first layer having a first thickness and a second layer having a second thickness. The first layer affects acoustic properties of the acoustic wave device and the second layer affects electrical properties of the acoustic wave device. The first layer is positioned between the piezoelectric layer and the second layer. The first thickness is configured such that a frequency response of the acoustic wave device includes a Rayleigh mode response at a frequency higher than a shear horizontal mode response resonance.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 30, 2023
    Inventors: Joji Fujiwara, Riho Sasaki, Kyohei Kobayashi, Noriaki Amo, Yosuke Hamaoka
  • Publication number: 20230094376
    Abstract: An acoustic wave device is disclosed. The acoustic waved device can be a shear horizontal mode surface acoustic wave device. The acoustic wave device can include a piezoelectric layer, an interdigital transducer electrode over the piezoelectric layer, and a temperature compensation layer over the interdigital transducer electrode. The piezoelectric layer can be a lithium niobate layer with a cut angle in a range of ?20° YX to 25° YX. The interdigital transducer electrode including a first layer and a second layer. The first layer affects acoustic properties of the acoustic wave device and the second layer affects electrical properties of the acoustic wave device. The second layer is positioned between the piezoelectric layer and the first layer such that a frequency response of the acoustic wave device includes a Rayleigh mode response at a frequency higher than a shear horizontal mode response.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 30, 2023
    Inventors: Joji Fujiwara, Riho Sasaki, Kyohei Kobayashi, Noriaki Amo, Yosuke Hamaoka
  • Publication number: 20230043197
    Abstract: A low velocity surface acoustic wave device, and a method of reducing the velocity of a surface acoustic wave generated by a surface acoustic wave device are described, the device including a piezoelectric layer, an interdigital transducer disposed on the piezoelectric substrate and configured to generate a surface acoustic wave in response to an electrical, and a temperature coefficient of frequency compensation layer disposed partially on the interdigital transducer and partially on the piezoelectric substrate, the temperature coefficient of frequency compensation layer having a low velocity layer disposed within it configured to reduce the velocity of a surface acoustic wave generated by the interdigital transducer, the method including disposing a wave velocity adjustment layer, the wave velocity adjustment layer being a low velocity layer, within a temperature compensation layer of the surface acoustic wave device.
    Type: Application
    Filed: August 2, 2022
    Publication date: February 9, 2023
    Inventors: Joji Fujiwara, Riho Sasaki, Kyohei Kobayashi, Noriaki Amo
  • Patent number: 11444599
    Abstract: An acoustic wave device comprises a substrate including a piezoelectric material, interdigital transducer (IDT) electrodes disposed on an upper surface of the substrate. The IDT electrodes having gap regions, edge regions, and center regions. A duty factor of the IDT electrodes in the edge regions is greater than the duty factor of the IDT electrodes in the center regions. A first dielectric film is disposed above the IDT electrodes and an upper surface of the substrate. The first dielectric film has a greater thickness in portions of the center regions than in portions proximate the gap regions.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: September 13, 2022
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Riho Sasaki, Joji Fujiwara
  • Publication number: 20210067136
    Abstract: An acoustic wave device comprises a substrate including a piezoelectric material, and interdigital transducer (IDT) electrodes disposed on a surface of the substrate. The IDT electrodes have gap regions, edge regions, and center regions. A maximum width of the IDT electrodes in the gap regions is greater than the maximum width of the IDT electrodes in the edge regions, thereby achieving a velocity of an acoustic wave in the gap regions being greater than the velocity of the acoustic wave in the center regions, and the velocity of the acoustic wave in the center regions being greater than the velocity of the acoustic wave in the edge regions.
    Type: Application
    Filed: August 25, 2020
    Publication date: March 4, 2021
    Inventors: Joji Fujiwara, Riho Sasaki
  • Publication number: 20210067127
    Abstract: An acoustic wave device comprises a substrate including a piezoelectric material, interdigital transducer (IDT) electrodes disposed on an upper surface of the substrate. The IDT electrodes having gap regions, edge regions, and center regions. A duty factor of the IDT electrodes in the edge regions is greater than the duty factor of the IDT electrodes in the center regions. A first dielectric film is disposed above the IDT electrodes and an upper surface of the substrate. The first dielectric film has a greater thickness in portions of the center regions than in portions proximate the gap regions.
    Type: Application
    Filed: August 25, 2020
    Publication date: March 4, 2021
    Inventors: Riho Sasaki, Joji Fujiwara
  • Patent number: 7010273
    Abstract: A high-frequency hybrid switch module arranged applicable to at least two different communications systems includes two low pass filters (LPFs), two phase shifters, a field effect transistor (FET) switch including FETs, and two SAW filters. The FETs and the SAW filters are mounted on a layered assembly including the LPFs and an electrode pattern of the phase shifters. The module can have a small overall size, a low cost, and a small loss, while being protected from static electricity. The module requires small number of low-noise amplifiers at a signal receiving side.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: March 7, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuki Satoh, Hiroshi Kushitani, Riho Sasaki, Narihiro Mita
  • Patent number: 6870442
    Abstract: The invention aims to provide a high-frequency device enable to protect circuits connected to an antenna terminal from possible intruding static electricity or high voltage noises. Diplexer 11 connected to antenna terminal 10 carries out demultiplexing or multiplexing frequency for GSM or DCS band. Circuits to process frequency for GSM and DCS band have switches 13 and 14 respectively for switching to transmit or to receive signals for diplexer 11. Switch 13 and 14 are connected to low pass filters 15 and 16 respectively to clear off higher harmonics in transmitting signals, and are connected to SAW filters 17 and 18 having respective specific pass bands. Filters 15, 16, 17 and 18 are connected to terminals 19, 20, 21 and 22 respectively. Moreover, a first end of varistor 23 is connected between antenna terminal 10 and diplexer 11 and a second end of varistor 23 is connected to ground terminal 24.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: March 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kotaro Suzuki, Riho Sasaki, Yoshiharu Omori
  • Patent number: 6749891
    Abstract: A precipitate film having plating resistance may be formed on the surface of a varistor element during sintering process. Accordingly, the manufacturing process can be shortened, thereby improving the productivity. The manufacturing method comprises (a) a first process of forming the varistor element whose main component is zinc oxide; (b) a second process of sintering the varistor element and precipitating zinc compound having at least one of acid resistance and alkali resistance on the surface of the varistor. Preferably, the manufacturing method further comprises (c) a process of attaching an external electrode to the varistor element, and the external electrode attaching process is executed after finishing the varistor element sintering process.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: June 15, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaori Shiraishi, Tatsuya Inoue, Riho Sasaki, Keiichi Noi, Hideaki Tokunaga
  • Publication number: 20040048634
    Abstract: A high-frequency hybrid switch module arranged applicable to at least two different communications systems includes two low pass filters (LPFs), two phase shifters, a field effect transistor (FET) switch including FETs, and two SAW filters. The FETs and the SAW filters are mounted on a layered assembly including the LPFs and an electrode pattern of the phase shifters. The module can have a small overall size, a low cost, and a small loss, while being protected from static electricity. The module requires small number of low-noise amplifiers at a signal receiving side.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 11, 2004
    Inventors: Yuki Satoh, Hiroshi Kushitani, Riho Sasaki, Narihiro Mita
  • Publication number: 20030043013
    Abstract: A precipitate film having plating resistance may be formed on the surface of a varistor element during sintering process. Accordingly, the manufacturing process can be shortened, thereby improving the productivity. The manufacturing method comprises (a) a first process of forming the varistor element whose main component is zinc oxide; (b) a second process of sintering the varistor element and precipitating zinc compound having at least one of acid resistance and alkali resistance on the surface of the varistor. Preferably, the manufacturing method further comprises (c) a process of attaching an external electrode to the varistor element, and the external electrode attaching process is executed after finishing the varistor element sintering process.
    Type: Application
    Filed: July 18, 2002
    Publication date: March 6, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kaori Shiraishi, Tatsuya Inoue, Riho Sasaki, Keiichi Noi, Hideaki Tokunaga
  • Publication number: 20030043012
    Abstract: A precipitate film having plating resistance may be formed on the surface of a varistor element during sintering process. Accordingly, the manufacturing process can be shortened, thereby improving the productivity. The manufacturing method comprises (a) a first process of forming the varistor element whose main component is zinc oxide; (b) a second process of sintering the varistor element and precipitating zinc compound having at least one of acid resistance and alkali resistance on the surface of the varistor. Preferably, the manufacturing method further comprises (c) a process of attaching an external electrode to the varistor element, and the external electrode attaching process is executed after finishing the varistor element sintering process.
    Type: Application
    Filed: August 30, 2001
    Publication date: March 6, 2003
    Inventors: Kaori Shiraishi, Tatsuya Inoue, Riho Sasaki, Keiichi Noi, Hideaki Tokunaga