Patents by Inventor Riichiro Mitsuhashi

Riichiro Mitsuhashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110008954
    Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.
    Type: Application
    Filed: September 13, 2010
    Publication date: January 13, 2011
    Applicants: PANASONIC CORPORATION, IMEC
    Inventors: Shigenori HAYASHI, Riichiro Mitsuhashi
  • Patent number: 7816244
    Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: October 19, 2010
    Assignees: Panasonic Corporation, IMEC
    Inventors: Shigenori Hayashi, Riichiro Mitsuhashi
  • Publication number: 20090130833
    Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.
    Type: Application
    Filed: January 22, 2009
    Publication date: May 21, 2009
    Applicants: PANASONIC CORPORATION, INTERUNIVERSITAIR MICRO-ELEKTRONICA CENTRUM VZW
    Inventors: Shigenori Hayashi, Riichiro Mitsuhashi
  • Patent number: 7495298
    Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: February 24, 2009
    Assignees: Panasonic Corporation, Interuniversitair Micro-Elektronica Centrum VZW
    Inventors: Shigenori Hayashi, Riichiro Mitsuhashi
  • Publication number: 20080237728
    Abstract: A semiconductor device includes: a p-type active region and an n-type active region which are formed in a semiconductor substrate; a first MISFET including a first gate insulating film formed on the p-type active region and a first gate electrode formed on the first gate insulating film and including a first electrode formation film containing a metal element; and a second MISFET including a second gate insulating film formed on the n-type active region and a second gate electrode formed on the second gate insulating film and including a second electrode formation film. The second electrode formation film contains the same metal element as the first electrode formation film and has an oxygen content higher than the first electrode formation film.
    Type: Application
    Filed: October 30, 2007
    Publication date: October 2, 2008
    Inventors: Riichiro Mitsuhashi, Kota Oikawa, Osullivan Barry, Stefan Kubicek
  • Publication number: 20080197421
    Abstract: A semiconductor device includes a p-type active region and an n-type active region which are formed in a semiconductor substrate and a p-type MISFET including a gate insulating film formed on the p-type active region and a first gate electrode including a first electrode formation film of which upper part has a concentration of La higher than the other part thereof. The semiconductor device further includes an n-type MISFET including a gate insulating film formed on the n-type active region and a second gate electrode including a second electrode formation film of which upper part has a concentration of Al higher than the other part thereof.
    Type: Application
    Filed: August 30, 2007
    Publication date: August 21, 2008
    Inventors: Riichiro Mitsuhashi, Raghunath Singanamalla
  • Publication number: 20070007564
    Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.
    Type: Application
    Filed: March 9, 2006
    Publication date: January 11, 2007
    Inventors: Shigenori Hayashi, Riichiro Mitsuhashi
  • Patent number: 6667246
    Abstract: A substrate with a metal oxide film deposited thereon is annealed, and then the surface of the metal oxide film is exposed to a plasma, after which the metal oxide film is removed by wet-etching.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: December 23, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Riichiro Mitsuhashi, Masafumi Kubota, Shigenori Hayashi
  • Publication number: 20030104706
    Abstract: A substrate with a metal oxide film deposited thereon is annealed, and then the surface of the metal oxide film is exposed to a plasma, after which the metal oxide film is removed by wet-etching.
    Type: Application
    Filed: December 4, 2002
    Publication date: June 5, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Riichiro Mitsuhashi, Masafumi Kubota, Shigenori Hayashi