Abstract: A computer-implemented method for invalidating an access token includes generating an access token and an HTML file in response to receipt of a request for issuing the access token, the HTML file comprising a set of instructions for rendering on one window in a browser, a code for generating a child segment in a memory which is controlled by the window, and a code for invalidating the access token in response to completion of rendering on the child segment, in response to completion of receiving, from a resource server, one or more resources requested by a client program executed on the child segment or in response to closing of the window, sending the access token and the HTML file to the browser, and invalidating the access token, in response to receipt, from the browser, of a request for invalidating the access token.

Abstract: A computer-implemented method for invalidating an access token includes generating an access token and an HTML file in response to receipt of a request for issuing the access token, the HTML file comprising a set of instructions for rendering on one window in a browser, a code for generating a child segment in a memory which is controlled by the window, and a code for invalidating the access token in response to completion of rendering on the child segment, in response to completion of receiving, from a resource server, one or more resources requested by a client program executed on the child segment or in response to closing of the window, sending the access token and the HTML file to the browser, and invalidating the access token, in response to receipt, from the browser, of a request for invalidating the access token.

Abstract: A computer-implemented method for invalidating an access token includes generating an access token and an HTML file in response to receipt of a request for issuing the access token, the HTML file comprising a set of instructions for rendering on one window in a browser, a code for generating a child segment in a memory which is controlled by the window, and a code for invalidating the access token in response to completion of rendering on the child segment, in response to completion of receiving, from a resource server, one or more resources requested by a client program executed on the child segment or in response to closing of the window, sending the access token and the HTML file to the browser, and invalidating the access token, in response to receipt, from the browser, of a request for invalidating the access token.

Abstract: A computer-implemented method for data-deduplication of genome data that is in different file formats is described. Representative data from different genome file formats is conformed to a selected file format and compared. Duplicate files are identified and duplicate files are released, with at least one file copy being retained.

Abstract: A method of reducing power consumption of a buffer for cache in a tape drive connected to a host in a communicable manner, according to one embodiment, includes detecting a transfer rate of data from the host or to the host, and determining a writing or reading rate of data to or from a tape based on the data transfer rate. A determination is made as to whether predetermined conditions including the data transfer rate, the data writing or reading rate, and a capacity of a buffer are satisfied, where the buffer includes at least two buffer areas. At least one of the buffer areas is selected when the predetermined conditions are satisfied. The selected buffer area is switched to a power saving mode.

Abstract: A computer-implemented method for invalidating an access token includes generating an access token and an HTML file in response to receipt of a request for issuing the access token, the HTML file comprising a set of instructions for rendering on one window in a browser, a code for generating a child segment in a memory which is controlled by the window, and a code for invalidating the access token in response to completion of rendering on the child segment, in response to completion of receiving, from a resource server, one or more resources requested by a client program executed on the child segment or in response to closing of the window, sending the access token and the HTML file to the browser, and invalidating the access token, in response to receipt, from the browser, of a request for invalidating the access token.

Abstract: A computer-implemented method for data-deduplication of genome data that is in different file formats is described. Representative data from different genome file formats is conformed to a selected file format and compared. Duplicate files are identified and duplicate files are released, with at least one file copy being retained.

Abstract: A scheduling device according to one embodiment includes an access request accepting section and an access request selecting section. The access request accepting section is configured to accept access requests from requesters. The access request selecting section is configured to select a first access request as a reference for access request selection from among the accepted access requests, select an access request transferable in a bank interleave (BI) mode with respect to the first access request, and select an access request transferable in a continuous read/write (CN) mode in response to a determination that there is no access request transferable in the BI mode, or that the preceding access request was in the BI or the CN mode. The access request selecting section is configured to repeat the selections in response to a determination that there is no access request transferable in the BI mode and in the CN mode.

Abstract: A method of reducing power consumption of a buffer for cache in a tape drive connected to a host in a communicable manner, according to one embodiment, includes detecting a transfer rate of data from the host or to the host, and determining a writing or reading rate of data to or from a tape based on the data transfer rate. A determination is made as to whether predetermined conditions including the data transfer rate, the data writing or reading rate, and a capacity of a buffer are satisfied, where the buffer includes at least two buffer areas. At least one of the buffer areas is selected when the predetermined conditions are satisfied. The selected buffer area is switched to a power saving mode.

Abstract: The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.

Abstract: A method of reducing power consumption of a buffer for cache in a tape drive connected to a host in a communicable manner, according to one embodiment, includes detecting a transfer rate of data from the host or to the host, and determining a writing or reading rate of data to or from a tape based on the data transfer rate. A determination is made as to whether predetermined conditions including the data transfer rate, the data writing or reading rate, and a capacity of a buffer are satisfied, where the buffer includes at least two buffer areas. At least one of the buffer areas is selected when the predetermined conditions are satisfied. The selected buffer area is switched to a power saving mode.

Abstract: The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.

Abstract: A scheduling device according to one embodiment includes an access request accepting section and an access request selecting section. The access request accepting section is configured to accept access requests from requesters. The access request selecting section is configured to select a first access request as a reference for access request selection from among the accepted access requests, select an access request transferable in a bank interleave (BI) mode with respect to the first access request, and select an access request transferable in a continuous read/write (CN) mode in response to a determination that there is no access request transferable in the BI mode, or that the preceding access request was in the BI or the CN mode. The access request selecting section is configured to repeat the selections in response to a determination that there is no access request transferable in the BI mode and in the CN mode.

Abstract: The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.

Abstract: A method for equalizing the bandwidth of requesters using a shared memory system is disclosed. In one embodiment, such a method includes receiving multiple access requests to access a shared memory system. Each access request originates from a different requester coupled to the shared memory system. The method then determines which of the access requests has been waiting the longest to access the shared memory system. The access requests are then ordered so that the access request that has been waiting the longest is transmitted to the shared memory system after the other access requests. The requester associated with the longest-waiting access request may then transmit additional access requests to the shared memory system immediately after the longest-waiting access request has been transmitted. A corresponding apparatus and computer program product are also disclosed.

Abstract: A method of reducing power consumption of a buffer for cache in a tape drive connected to a host in a communicable manner, according to one embodiment, includes detecting a transfer rate of data from the host or to the host, and determining a writing or reading rate of data to or from a tape based on the data transfer rate. A determination is made as to whether predetermined conditions including the data transfer rate, the data writing or reading rate, and a capacity of a buffer are satisfied, where the buffer includes at least two buffer areas. At least one of the buffer areas is selected when the predetermined conditions are satisfied. The selected buffer area is switched to a power saving mode.

Abstract: Provided is a memory access device for a shared memory mechanism of main memory for a plurality of CPUs. The present invention includes a plurality of CPUs using memory as main memory, another function block using memory as a buffer, a CPU interface which controls access transfer from the plurality of CPUs to memory, and a DRAM controller for performing arbitration of the access transfer to the memory. Therein, the CPU interface causes access requests from the plurality of CPUs to wait, and receives and stores the address, data transfer mode and data size of each access, notifies the DRAM controller of the access requests, and then, upon receiving grant signals for the access requests, sends information to the DRAM controller according to the grant signals, whereupon the DRAM controller receives the grant signals, and on the basis of the access arbitration, specifies CPUs for which transfers have been granted so as to send the grant signals to the CPU interface.

Abstract: A method for equalizing the bandwidth of requesters using a shared memory system is disclosed. In one embodiment, such a method includes receiving multiple access requests to access a shared memory system. Each access request originates from a different requester coupled to the shared memory system. The method then determines which of the access requests has been waiting the longest to access the shared memory system. The access requests are then ordered so that the access request that has been waiting the longest is transmitted to the shared memory system after the other access requests. The requester associated with the longest-waiting access request may then transmit additional access requests to the shared memory system immediately after the longest-waiting access request has been transmitted. A corresponding apparatus and computer program product are also disclosed.