Patents by Inventor Ripon Kumar DEY

Ripon Kumar DEY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220163863
    Abstract: An example electrophoretic display assembly includes: an outer substrate; an inner substrate; a first electrode and a second electrode disposed between the inner substrate and the outer substrate in a spaced apart relationship; and at least one substantially planar microstructure between the first and second electrodes, the microstructure containing an electrophoretic media. For example, the planar microstructures may be parallel to or perpendicular to the outer substrate. Also provided are example methods of fabricating electrophoretic display assemblies. A plurality of electrophoretic display assemblies may be combined to form an electrophoretic display, wherein each display assembly represents a pixel of the display device. The planar microstructures may increase the display quality, including the contrast or color capabilities of electrophoretic displays.
    Type: Application
    Filed: February 27, 2020
    Publication date: May 26, 2022
    Inventors: Matthew Thomas Lavrisa, Ryan Phillip Marchewka, Bo Cui, Ripon Kumar Dey
  • Patent number: 9522821
    Abstract: The invention provides a fabrication method of batch producing nano-scale structures, such as arrays of silicon pillars of high aspect ratio. The invention also relates to providing arrays of high aspect ratio silicon pillars fabricated using the improved fabrication method. The array of silicon pillars is fabricated from arrays of low aspect ratio pyramid-shaped structures. Mask formed from a hard material, such as a metal mask, is formed on top of each of the pyramid-shaped structures in a batch process. The pyramid-shaped structures are subsequently etched to remove substrate materials not protected by the hard masks, so that a high aspect ratio pillar or shaft is formed on the pyramid-shaped low aspect ratio base, resulting in an array of high aspect ratio silicon pillars.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: December 20, 2016
    Inventors: Bo Cui, Ripon Kumar Dey
  • Publication number: 20160068384
    Abstract: The invention provides a fabrication method of batch producing nano-scale structures, such as arrays of silicon pillars of high aspect ratio. The invention also relates to providing arrays of high aspect ratio silicon pillars fabricated using the improved fabrication method. The array of silicon pillars is fabricated from arrays of low aspect ratio pyramid-shaped structures. Mask formed from a hard material, such as a metal mask, is formed on top of each of the pyramid-shaped structures in a batch process. The pyramid-shaped structures are subsequently etched to remove substrate materials not protected by the hard masks, so that a high aspect ratio pillar or shaft is formed on the pyramid-shaped low aspect ratio base, resulting in an array of high aspect ratio silicon pillars.
    Type: Application
    Filed: April 9, 2014
    Publication date: March 10, 2016
    Inventors: Bo CUI, Ripon Kumar DEY