Abstract: When a checkpoint comes, the control section selects some of a plurality of small areas which are transfer targets in the memory as small areas to be transferred to the outside of the own computer through the save area (indirect transfer small areas), and selects the others as small areas to be transferred to the outside of the own computer not through the save area (direct transfer small areas). Within a period in which updating from the own computer to the memory is suspended, the control section copies stored data in the small areas selected as the indirect transfer small areas from the memory to the save area with use of the copy section, and in parallel to the copying, transfers stored data in the small areas selected as the direct transfer small areas from the memory to the outside of the own computer with use of the communication section.

Abstract: When a checkpoint comes, the control section selects some of a plurality of small areas which are transfer targets in the memory as small areas to be transferred to the outside of the own computer through the save area (indirect transfer small areas), and selects the others as small areas to be transferred to the outside of the own computer not through the save area (direct transfer small areas). Within a period in which updating from the own computer to the memory is suspended, the control section copies stored data in the small areas selected as the indirect transfer small areas from the memory to the save area with use of the copy section, and in parallel to the copying, transfers stored data in the small areas selected as the direct transfer small areas from the memory to the outside of the own computer with use of the communication section.

Abstract: An apparatus, includes a search unit which searches a critical signal path from a plurality of candidate signal paths connecting a first terminal and a second terminal, the critical signal path including the most strict delay limit in the plurality of candidate signal paths, and a display control unit which controls a display device for displaying an information regarding to a circuit element, the circuit element including the critical signal path.

Abstract: An apparatus for designing a circuit comprises an arranging element which arranges a first wiring required a predetermined clearance between the first wiring and other wirings and a second wiring being thinner in a wiring width than the first wiring, a calculating element which calculates a particular part of the second wiring, the particular part is required to keep the clearance between the particular part and other wirings; and an area generating element which generates an area indicative of a position apart from the first wiring and the particular part by a distance corresponding to the clearance.

Abstract: There is provided an integrated circuit layout design method capable of performing LVS verification in an early stage of layout design. Placement and routing means provides wiring and outputs a layout in which short circuits are possibly left uncorrected. Short-circuit correcting means performs rewiring by using a newly defined tentative wiring layer in which short-circuit wiring portions are removed and outputs an inter-layer method for interconnecting the tentative wiring layer and the original wiring layer to an inter-layer connection information file. Layout verification means uses the corrected layout and an LVS rule file in which the inter-layer connection method is reflected to perform LVS on the layout in which the short circuit portions are modified to correct connections through use of the tentative wiring layer.

Abstract: An apparatus, includes a search unit which searches a critical signal path from a plurality of candidate signal paths connecting a first terminal and a second terminal, the critical signal path including the most strict delay limit in the plurality of candidate signal paths, and a display control unit which controls a display device for displaying an information regarding to a circuit element, the circuit element including the critical signal path.

Abstract: An apparatus for designing a circuit comprises an arranging element which arranges a first wiring required a predetermined clearance between the first wiring and other wirings and a second wiring being thinner in a wiring width than the first wiring, a calculating element which calculates a particular part of the second wiring, the particular part is required to keep the clearance between the particular part and other wirings; and an area generating element which generates an area indicative of a position apart from the first wiring and the particular part by a distance corresponding to the clearance.

Abstract: There is provided an integrated circuit layout design method capable of performing LVS verification in an early stage of layout design. Placement and routing means provides wiring and outputs a layout in which short circuits are possibly left uncorrected. Short-circuit correcting means performs rewiring by using a newly defined tentative wiring layer in which short-circuit wiring portions are removed and outputs an inter-layer method for interconnecting the tentative wiring layer and the original wiring layer to an inter-layer connection information file. Layout verification means uses the corrected layout and an LVS rule file in which the inter-layer connection method is reflected to perform LVS on the layout in which the short circuit portions are modified to correct connections through use of the tentative wiring layer.