Patents by Inventor Rishi Pratap SINGH
Rishi Pratap SINGH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240097429Abstract: Illustrative GFCI devices and methods maintain safety while reducing the risk of unnecessary interruptions. One illustrative GFCI circuit includes: a first operational amplifier configured to couple to a first current transformer that senses a net current through multiple power conductors, the first operational amplifier configured to convert a signal current from a signal terminal of the first current transformer to a signal voltage, the signal voltage having an inverse dependence on frequency; an analog to digital converter configured to provide samples of the signal voltage; and a controller configured to interrupt at least one of the multiple power conductors when an magnitude measurement derived from the samples exceeds a frequency-independent and/or phase-independent threshold a predetermined number of times or for a predetermined time period.Type: ApplicationFiled: August 15, 2023Publication date: March 21, 2024Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Rishi Pratap SINGH, Colton JENSEN, Yixin SONG, Seunghan BACK
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Patent number: 11668752Abstract: Implementations of ground fault circuit interrupter (GFCI) self-test circuits may include: a current transformer coupled to a controller, a silicon controlled rectifier (SCR) test loop coupled to the controller, a ground fault test loop coupled to the controller, and a solenoid coupled to the controller. The SCR test loop may be configured to conduct an SCR self-test during a first half wave portion of a phase and the ground fault test loop may be configured to conduct a ground fault self-test during a second half wave portion of a phase. An SCR may be configured to activate the solenoid to deny power to a load upon one of the SCR self-test or the ground fault self-test being identified as failing.Type: GrantFiled: March 1, 2022Date of Patent: June 6, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bruce G. Armstrong, Rishi Pratap Singh, Sanath Kumar Kondur Surya Kumar, Riley Beck
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Publication number: 20220268840Abstract: Implementations of ground fault circuit interrupter (GFCI) self-test circuits may include: a current transformer coupled to a controller, a silicon controlled rectifier (SCR) test loop coupled to the controller, a ground fault test loop coupled to the controller, and a solenoid coupled to the controller. The SCR test loop may be configured to conduct an SCR self-test during a first half wave portion of a phase and the ground fault test loop may be configured to conduct a ground fault self-test during a second half wave portion of a phase. An SCR may be configured to activate the solenoid to deny power to a load upon one of the SCR self-test or the ground fault self-test being identified as failing.Type: ApplicationFiled: March 1, 2022Publication date: August 25, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bruce G. ARMSTRONG, Rishi Pratap SINGH, Sanath Kumar KONDUR SURYA KUMAR, Riley BECK
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Patent number: 11411388Abstract: Implementations of fault detection circuits may include a first current transformer coupled to a second current transformer, a positive feedback circuit including the first current transformer, the second current transformer, a first switch, and one of a comparator, an amplifier, and an inverter. The circuit may also include a plurality of logic gates that may be coupled with the positive feedback circuit. The positive feedback circuit may be configured to oscillate upon detecting a ground neutral fault and to send a fault signal to the plurality of logic gates. The plurality of logic gates may be configured to analyze the fault signal and open the first switch. The plurality of logic gates may be further configured to identify whether the fault signal represents one of a true fault or a noise fault by analyzing the output of the positive feedback circuit after the first switch has been opened.Type: GrantFiled: August 7, 2020Date of Patent: August 9, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Rishi Pratap Singh, Riley Beck
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Patent number: 11300617Abstract: Implementations of ground fault circuit interrupter (GFCI) self-test circuits may include: a current transformer coupled to a controller, a silicon controlled rectifier (SCR) test loop coupled to the controller, a ground fault test loop coupled to the controller, and a solenoid coupled to the controller. The SCR test loop may be configured to conduct an SCR self-test during a first half wave portion of a phase and the ground fault test loop may be configured to conduct a ground fault self-test during a second half wave portion of a phase. An SCR may be configured to activate the solenoid to deny power to a load upon one of the SCR self-test or the ground fault self-test being identified as failing.Type: GrantFiled: July 1, 2019Date of Patent: April 12, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bruce G. Armstrong, Rishi Pratap Singh, Sanath Kumar Kondur Surya Kumar, Riley Beck
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Publication number: 20200371166Abstract: Implementations of fault detection circuits may include a first current transformer coupled to a second current transformer, a positive feedback circuit including the first current transformer, the second current transformer, a first switch, and one of a comparator, an amplifier, and an inverter. The circuit may also include a plurality of logic gates that may be coupled with the positive feedback circuit. The positive feedback circuit may be configured to oscillate upon detecting a ground neutral fault and to send a fault signal to the plurality of logic gates. The plurality of logic gates may be configured to analyze the fault signal and open the first switch. The plurality of logic gates may be further configured to identify whether the fault signal represents one of a true fault or a noise fault by analyzing the output of the positive feedback circuit after the first switch has been opened.Type: ApplicationFiled: August 7, 2020Publication date: November 26, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Rishi Pratap SINGH, Riley BECK
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Patent number: 10788540Abstract: Implementations of fault detection circuits may include a first current transformer coupled to a second current transformer, a positive feedback circuit including the first current transformer, the second current transformer, a first switch, and one of a comparator, an amplifier, and an inverter. The circuit may also include a plurality of logic gates that may be coupled with the positive feedback circuit. The positive feedback circuit may be configured to oscillate upon detecting a ground neutral fault and to send a fault signal to the plurality of logic gates. The plurality of logic gates may be configured to analyze the fault signal and open the first switch. The plurality of logic gates may be further configured to identify whether the fault signal represents one of a true fault or a noise fault by analyzing the output of the positive feedback circuit after the first switch has been opened.Type: GrantFiled: October 27, 2017Date of Patent: September 29, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley Beck, Rishi Pratap Singh
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Publication number: 20200041567Abstract: Implementations of ground fault circuit interrupter (GFCI) self-test circuits may include: a current transformer coupled to a controller, a silicon controlled rectifier (SCR) test loop coupled to the controller, a ground fault test loop coupled to the controller, and a solenoid coupled to the controller. The SCR test loop may be configured to conduct an SCR self-test during a first half wave portion of a phase and the ground fault test loop may be configured to conduct a ground fault self-test during a second half wave portion of a phase. An SCR may be configured to activate the solenoid to deny power to a load upon one of the SCR self-test or the ground fault self-test being identified as failing.Type: ApplicationFiled: July 1, 2019Publication date: February 6, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bruce G. ARMSTRONG, Rishi Pratap SINGH, Sanath Kumar KONDUR SURYA KUMAR, Riley BECK
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Publication number: 20190128941Abstract: Implementations of fault detection circuits may include a first current transformer coupled to a second current transformer, a positive feedback circuit including the first current transformer, the second current transformer, a first switch, and one of a comparator, an amplifier, and an inverter. The circuit may also include a plurality of logic gates that may be coupled with the positive feedback circuit. The positive feedback circuit may be configured to oscillate upon detecting a ground neutral fault and to send a fault signal to the plurality of logic gates. The plurality of logic gates may be configured to analyze the fault signal and open the first switch. The plurality of logic gates may be further configured to identify whether the fault signal represents one of a true fault or a noise fault by analyzing the output of the positive feedback circuit after the first switch has been opened.Type: ApplicationFiled: October 27, 2017Publication date: May 2, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley BECK, Rishi Pratap SINGH
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Patent number: 10141734Abstract: Aspects of an electrical safety device that provides detection of miswiring of line and load connection pairs are presented. In an example, the device includes a differential current detector through which are routed a live current path and a neutral current path coupling the line and load connection pairs. The device also includes a selectable conducting path that, when selected, circumvents the differential current detector while coupling one of a line live connection to a load live connection or a line neutral connection to a load neutral connection of the connection pairs. The device further includes a control circuit that determines, via the differential current detector, while the conducting path is selected, a differential current defined by a difference in currents on the live and neutral current paths, and interrupts at least one of the live and neutral current paths in response to the differential current not exceeding a threshold value.Type: GrantFiled: September 10, 2015Date of Patent: November 27, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. Beck, Kent D. Layton, Scott R. Grange, Rishi Pratap Singh
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Publication number: 20160118785Abstract: Aspects of an electrical safety device that provides detection of miswiring of line and load connection pairs are presented. In an example, the device includes a differential current detector through which are routed a live current path and a neutral current path coupling the line and load connection pairs. The device also includes a selectable conducting path that, when selected, circumvents the differential current detector while coupling one of a line live connection to a load live connection or a line neutral connection to a load neutral connection of the connection pairs. The device further includes a control circuit that determines, via the differential current detector, while the conducting path is selected, a differential current defined by a difference in currents on the live and neutral current paths, and interrupts at least one of the live and neutral current paths in response to the differential current not exceeding a threshold value.Type: ApplicationFiled: September 10, 2015Publication date: April 28, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Riley D. BECK, Kent D. LAYTON, Scott R. GRANGE, Rishi Pratap SINGH