Abstract: The present invention provides a novel I/O pad structure and layout methodology which allows the effective wire bonding pitch to be reduced by circumventing the usual constraints of wire bonding technology. The bonding pad layout of the present invention entails the use of two rows of pads on the chip periphery as opposed to the more conventional single row, in-line arrangement. The bonding pads are arranged in a novel way, by radial staggering, to ensure no overlapping of bonding wire trajectories, even when conventional lead frames are used for the package. Comparing the radially staggered arrangement of the bonding pads of the present invention to convention single row, in-line bonding pad configuration, in the radially staggered arrangement every other pad is moved inward in the radial direction to form a second row. The radial direction used is from a projection point, typically the die center, and is dependent on the I/O circuitry height and the total number of pins of the package.