Patents by Inventor Rita Klein
Rita Klein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080085419Abstract: Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a first (lower) electrode, sputter depositing a thin diffusion layer of a conductive material over the chalcogenide material, diffusing metal from the diffusion layer into the chalcogenide material resulting in a metal-comprising resistance variable material, and then plating a conductive material to a desired thickness to form a second (upper) electrode.Type: ApplicationFiled: October 15, 2007Publication date: April 10, 2008Inventor: Rita Klein
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Publication number: 20070123039Abstract: A method of forming a metal cap over a conductive interconnect in a chalcogenide-based memory device is provided and includes, forming a layer of a first conductive material over a substrate, depositing an insulating layer over the first conductive material and the substrate, forming an opening in the insulating layer to expose at least a portion of the first conductive material, depositing a second conductive material over the insulating layer and within the opening, removing portions of the second conductive material to form a conductive area within the opening, recessing the conductive area within the opening to a level below an upper surface of the insulating layer, forming a cap of a third conductive material over the recessed conductive area within the opening, depositing a stack of a chalcogenide based memory cell material over the cap, and depositing a conductive material over the chalcogenide stack.Type: ApplicationFiled: January 29, 2007Publication date: May 31, 2007Inventors: Patricia Elkins, John Moore, Rita Klein
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Publication number: 20070048932Abstract: The invention includes methods of forming pluralities of electrically conductive structures. The methods can include formation of a gradient-containing material across a substrate and in direct physical contact with conductive surfaces of nodes. The gradient-containing material can consist essentially of tantalum nitride at a lowermost portion in contact with the conductive surfaces, consist essentially of tantalum at an uppermost portion, and have a TaN/Ta gradient extending between the lowermost and uppermost portions. Alternatively, the gradient-containing material can have a Co/W gradient extending therethrough. Conductive structures can be formed over the gradient-containing material. The invention also includes constructions comprising electrically conductive lines over a material having a TaN/Ta gradient, or a W/Co gradient, extending therethrough.Type: ApplicationFiled: September 1, 2005Publication date: March 1, 2007Inventors: Dale Collins, Rita Klein, James Green
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Publication number: 20060292294Abstract: An electroless plating composition comprising succinic acid, potassium carbonate, a source of cobalt metal ions, a reducing agent, and water is provided. An optional buffering agent may also be included in the composition. The composition may be used to deposit cobalt metal in or on semiconductor substrate surfaces including vias, trenches, and interconnects.Type: ApplicationFiled: June 28, 2005Publication date: December 28, 2006Inventors: Rita Klein, Adam Regner
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Publication number: 20060261040Abstract: A planarization method includes providing a second and/or third row Group VIII metal-containing surface (preferably, a platinum-containing surface) and positioning it for contact with a polishing surface in the presence of a planarization composition that includes an oxidizing agent.Type: ApplicationFiled: July 27, 2006Publication date: November 23, 2006Applicant: MICRON TECHNOLOGY, INC.Inventors: Rita Klein, Nishant Sinha, Gundu Sabde, Stefan Uhlenbrock, Donald Westmoreland
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Publication number: 20060094236Abstract: A method of forming a metal cap over a conductive interconnect in a chalcogenide-based memory device is provided and includes, forming a layer of a first conductive material over a substrate, depositing an insulating layer over the first conductive material and the substrate, forming an opening in the insulating layer to expose at least a portion of the first conductive material, depositing a second conductive material over the insulating layer and within the opening, removing portions of the second conductive material to form a conductive area within the opening, recessing the conductive area within the opening to a level below an upper surface of the insulating layer, forming a cap of a third conductive material over the recessed conductive area within the opening, the third conductive material selected from the group consisting of cobalt, silver, gold, copper, nickel, palladium, platinum, and alloys thereof, depositing a stack of a chalcogenide based memory cell material over the cap, and depositing a condType: ApplicationFiled: November 3, 2004Publication date: May 4, 2006Inventors: Patricia Elkins, John Moore, Rita Klein
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Publication number: 20060086931Abstract: Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a first (lower) electrode, sputter depositing a thin diffusion layer of a conductive material over the chalcogenide material, diffusing metal from the diffusion layer into the chalcogenide material resulting in a metal-comprising resistance variable material, and then plating a conductive material to a desired thickness to form a second (upper) electrode.Type: ApplicationFiled: November 2, 2005Publication date: April 27, 2006Applicant: Micron Technology, Inc.Inventor: Rita Klein
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Publication number: 20060068543Abstract: Non-volatile, resistance variable memory devices, integrated circuit elements, and methods of forming such devices are provided. According to one embodiment of a method of the invention, a memory device can be fabricated by depositing a chalcogenide material onto a first (lower) electrode, sputter depositing a thin diffusion layer of a conductive material over the chalcogenide material, diffusing metal from the diffusion layer into the chalcogenide material resulting in a metal-comprising resistance variable material, and then plating a conductive material to a desired thickness to form a second (upper) electrode.Type: ApplicationFiled: November 2, 2005Publication date: March 30, 2006Applicant: Micron Technology, Inc.Inventor: Rita Klein
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Publication number: 20060046453Abstract: Methods of electroless filling electrically different features such as contact openings to form interconnects and conductive contacts, and semiconductor devices, dies, and systems that incorporate the interconnects and contacts are disclosed. The contact openings are electrically shorted together with a selective material, a nucleation layer is selectively deposited onto the area to be plated (e.g., the base of the opening), and a conductive material is electroless plated onto the nucleation layer to fill the opening. The process achieves substantially simultaneous filling of openings having different surface potentials at an about even rate.Type: ApplicationFiled: September 1, 2004Publication date: March 2, 2006Applicant: Micron Technology, Inc.Inventors: Dale Collins, Rita Klein
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Publication number: 20060046454Abstract: Methods of electroless filling electrically different features such as contact openings to form interconnects and conductive contacts, and semiconductor devices, dies, and systems that incorporate the interconnects and contacts are disclosed. The contact openings are electrically shorted together with a selective material, a nucleation layer is selectively deposited onto the area to be plated (e.g., the base of the opening), and a conductive material is electroless plated onto the nucleation layer to fill the opening. The process achieves substantially simultaneous filling of openings having different surface potentials at an about even rate.Type: ApplicationFiled: March 9, 2005Publication date: March 2, 2006Applicant: Micron Technology, Inc.Inventors: Dale Collins, Rita Klein
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Publication number: 20060045974Abstract: A method of forming a silver-rich silver-selenide layer is provided. The method includes plating a silver layer on a silver-selenide layer using an electroless process and diffusing silver into the silver-selenide layer. Also, a method of forming a memory element is provided. The memory element is formed by forming a first electrode and forming a first layer of resistance variable material over the first electrode. A silver-selenide layer is formed over the first layer of resistance variable material and a silver layer is plated on the silver-selenide layer by an electroless process.Type: ApplicationFiled: August 25, 2004Publication date: March 2, 2006Inventors: Kristy Campbell, Rita Klein
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Publication number: 20050167277Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: August 4, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050167278Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: August 4, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050167279Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: August 4, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050167280Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: August 4, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050159086Abstract: A planarization method includes providing a second and/or third row Group VIII metal-containing surface (preferably, a platinum-containing surface) and positioning it for contact with a polishing surface in the presence of a planarization composition that includes a complexing agent.Type: ApplicationFiled: March 16, 2005Publication date: July 21, 2005Applicant: MICRON TECHNOLOGY, INC.Inventors: Nishant Sinha, Rita Klein
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Publication number: 20050139480Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: June 30, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050139481Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: June 30, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050139479Abstract: The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.Type: ApplicationFiled: February 8, 2005Publication date: June 30, 2005Inventors: Dale Collins, Richard Lane, Rita Klein
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Publication number: 20050006644Abstract: A method for forming an oxidation barrier including at least partially immersing a semiconductor device structure in an electroless plating bath that includes at least one metal salt and at least one reducing agent. The reaction of the at least one metal salt with the at least one reducing agent simultaneously deposits metal and a dopant thereof. The oxidation barrier may be used to form conductive structures of semiconductor device structures, such as a capacitor electrode, or may be formed adjacent conductive or semiconductive structures of semiconductor device structures to prevent oxidation thereof. The oxidation barrier is particularly useful for preventing oxidation during the formation and annealing of a dielectric structure from a high dielectric constant material, such as Ta2O5 or BST.Type: ApplicationFiled: August 20, 2003Publication date: January 13, 2005Inventor: Rita Klein