Abstract: An integrated circuit device includes a variable gain amplifier with multiple gain circuits coupled in parallel, where one or more of the multiple gain circuits comprises a first differential pair of transistors, and a complementarily switched second differential pair of transistors cross-connected to the first differential pair of transistors with a sign inversion relative to the first differential pair of transistors. Other examples are disclosed and claimed.

Abstract: An impedance matching network for a radio frequency (RF) transmission system can include first port for coupling to a first transistor differential pair. The network can further include a second port for coupling to a second tansistor differential pair. The network can further incluede a matching network connected to the port and the second port, the matching network comprised of a pair of coupled lines. Other aspects are described.

Abstract: A wireless communication device can include a channel matching network. The channel matching network includes a pair of coupled lines coupled to the input port, and a capacitive element coupled between the pair of coupled lines and an antenna load.

Abstract: Systems, methods, and circuitries are disclosed for performing self-interference cancellation in a transceiver. In one example, a self-interference cancellation system includes a cancellation signal circuitry, cancellation circuitry, down-conversion circuitry, and an LO derivation circuitry. The cancellation signal circuitry is configured to use a cancellation transmit (TX) local oscillator (LO) signal to up-convert a baseband transmit leakage replica signal to generate a cancellation signal. The cancellation circuitry is configured to combine the cancellation signal with a received signal to generate a corrected received signal. The down-conversion circuitry is configured to use a receive (RX) LO signal to down-convert the corrected received signal to generate a baseband received signal. The LO derivation circuitry is configured to derive the cancellation TX LO signal and the RX LO signal from a common LO signal.

Abstract: Systems, methods, and circuitries are disclosed for performing self-interference cancellation in a transceiver. In one example, a self-interference cancellation system includes a cancellation signal circuitry, cancellation circuitry, down-conversion circuitry, and an LO derivation circuitry. The cancellation signal circuitry is configured to use a cancellation transmit (TX) local oscillator (LO) signal to up-convert a baseband transmit leakage replica signal to generate a cancellation signal. The cancellation circuitry is configured to combine the cancellation signal with a received signal to generate a corrected received signal. The down-conversion circuitry is configured to use a receive (RX) LO signal to down-convert the corrected received signal to generate a baseband received signal. The LO derivation circuitry is configured to derive the cancellation TX LO signal and the RX LO signal from a common LO signal.

Abstract: Circuits for power-combined power amplifier array are provided, the circuits comprising: an input splitter coupled to an input that provides a plurality of outputs; a plurality of power amplifier unit cells, each power amplifier unit cell coupled to a corresponding output of the input splitter and each power amplifier unit cell providing an output signal at an output of the power amplifier unit cell; and a power combiner having an output, a plurality of inputs, each input coupled to the output of a corresponding power amplifier unit cell, and a plurality of C-L-C-section equivalents, each having an input connected to a corresponding one of the plurality of inputs of the power combiner and an output connected to the output of the power combiner.

Abstract: Circuits for power-combined power amplifier array are provided, the circuits comprising: an input splitter coupled to an input that provides a plurality of outputs; a plurality of power amplifier unit cells, each power amplifier unit cell coupled to a corresponding output of the input splitter and each power amplifier unit cell providing an output signal at an output of the power amplifier unit cell; and a power combiner having an output, a plurality of inputs, each input coupled to the output of a corresponding power amplifier unit cell, and a plurality of C-L-C-section equivalents, each having an input connected to a corresponding one of the plurality of inputs of the power combiner and an output connected to the output of the power combiner.

Abstract: A receiver system includes a blocker detector circuit configured to receive a radio frequency (RF) input signal and detect an existence of a blocker therein, and further configured to output a blocker detection signal indicative of the existence of the blocker. The receiver system further includes a configurable receiver circuit configured to receive the RF input signal and the blocker detection signal, and selectively configure the configurable receiver circuit between a first mode wherein the configurable receiver circuit exhibits first linearity characteristics, and a second mode wherein the configurable receiver circuit exhibits second, different linearity characteristics based on the blocker detection signal.

Abstract: A receiver system includes a blocker detector circuit configured to receive a radio frequency (RF) input signal and detect an existence of a blocker therein, and further configured to output a blocker detection signal indicative of the existence of the blocker. The receiver system further includes a configurable receiver circuit configured to receive the RF input signal and the blocker detection signal, and selectively configure the configurable receiver circuit between a first mode wherein the configurable receiver circuit exhibits first linearity characteristics, and a second mode wherein the configurable receiver circuit exhibits second, different linearity characteristics based on the blocker detection signal.

Abstract: Circuits for power-combined power amplifier array are provided, the circuits comprising: an input splitter coupled to an input that provides a plurality of outputs; a plurality of power amplifier unit cells, each power amplifier unit cell coupled to a corresponding output of the input splitter and each power amplifier unit cell providing an output signal at an output of the power amplifier unit cell; and a power combiner having an output, a plurality of inputs, each input coupled to the output of a corresponding power amplifier unit cell, and a plurality of C-L-C-section equivalents, each having an input connected to a corresponding one of the plurality of inputs of the power combiner and an output connected to the output of the power combiner.