Abstract: Self-aligned gate endcap (SAGE) architectures with vertical sidewalls, and methods of fabricating self-aligned gate endcap (SAGE) architectures with vertical sidewalls, are described. In an example, an integrated circuit structure includes a semiconductor fin having sidewalls along a length of the semiconductor fin, each sidewall tapering outwardly from a top of the semiconductor fin toward a bottom of the semiconductor fin. A gate endcap isolation structure is spaced apart from the semiconductor fin and has a length parallel with the length of the semiconductor fin. The gate endcap isolation structure has a substantially vertical sidewall laterally facing one of the outwardly tapering sidewalls of the semiconductor fin.

Abstract: A method and a dual-stage trapped-flux magnet cryostat apparatus are provided for implementing enhanced measurements at high magnetic fields. The dual-stage trapped-flux magnet cryostat system includes a trapped-flux magnet (TFM). A sample, for example, a single crystal, is adjustably positioned proximate to the surface of the TFM, using a translation stage such that the distance between the sample and the surface is selectively adjusted. A cryostat is provided with a first separate thermal stage provided for cooling the TFM and with a second separate thermal stage provided for cooling sample.

Abstract: A method and a dual-stage trapped-flux magnet cryostat apparatus are provided for implementing enhanced measurements at high magnetic fields. The dual-stage trapped-flux magnet cryostat system includes a trapped-flux magnet (TFM). A sample, for example, a single crystal, is adjustably positioned proximate to the surface of the TFM, using a translation stage such that the distance between the sample and the surface is selectively adjusted. A cryostat is provided with a first separate thermal stage provided for cooling the TFM and with a second separate thermal stage provided for cooling sample.