Patents by Inventor Ritika Singh

Ritika Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230310332
    Abstract: There is provided a method of manufacturing a multi-layered film structure on a handling substrate. The film structure may hold a core film layer, which may hold an active ingredient. There is also provided method for manufacturing multi-layered microstructures. The microstructures may be manufactured based on a provided multi-layered film structure having a core film layer holding an active ingredient. The active ingredient may be a drug, and the microstructures may be used for drug delivery.
    Type: Application
    Filed: June 22, 2021
    Publication date: October 5, 2023
    Applicant: MLMC THERAPEUTICS APS
    Inventors: Ritika Singh Petersen, Benjamin Robotham, David Williamson
  • Patent number: 11436936
    Abstract: A network device receives first signaling from a first parent device that assigns a first task for completion by a first child, and includes a first task allotment designated by the parent for the first child's completion of the first task. The network device receives second signaling, from a first child device, indicating that the first child has completed the first task. The network device sends third signaling to the first parent device requesting approval of the completion of the first task, and receives, responsive to the third signaling, an indicator of an approval, or a rejection, from the first parent device. The network device initiates provision of the first task allotment to the first child based on receipt of the indicator of approval from the first parent device.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: September 6, 2022
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Ritika Singh, Suresh Venkateswaran, Praveen Atreya, Manian Krishnamoorthy, Ananth Kamalesan, Jose Gomez
  • Publication number: 20190325778
    Abstract: A network device receives first signaling from a first parent device that assigns a first task for completion by a first child, and includes a first task allotment designated by the parent for the first child's completion of the first task. The network device receives second signaling, from a first child device, indicating that the first child has completed the first task. The network device sends third signaling to the first parent device requesting approval of the completion of the first task, and receives, responsive to the third signaling, an indicator of an approval, or a rejection, from the first parent device. The network device initiates provision of the first task allotment to the first child based on receipt of the indicator of approval from the first parent device.
    Type: Application
    Filed: June 15, 2018
    Publication date: October 24, 2019
    Inventors: Ritika Singh, Suresh Venkateswaran, Praveen Atreya, Manian Krishnamoorthy, Ananth Kamalesan, Jose Gomez
  • Publication number: 20160206513
    Abstract: The present invention relates to mass production of micro-containers containing an active ingredient and methods for manufacturing micro-containers containing an active ingredient.
    Type: Application
    Filed: September 1, 2014
    Publication date: July 21, 2016
    Inventors: Johan NAGSTRUP, Stephan Sylvest KELLER, Anja BOISEN, Ritika Singh PETERSEN
  • Patent number: 7834657
    Abstract: An inverter circuit has a digital signal amplitude converter having an input coupled to an inverter circuit input node, and an amplitude converter output. A positive threshold voltage compensation generator has a positive threshold voltage compensation generator input coupled to the amplitude converter output. A negative threshold voltage compensation generator has a negative threshold voltage compensation generator input coupled to the inverter circuit input node, and a negative threshold voltage compensation generator output. A multiplexer has a first input coupled to the positive threshold voltage compensation generator output, a second input, coupled to the negative threshold voltage compensation generator output, and a multiplexer output. An inverter module has an output providing an inverter circuit output node, and an inverter module input is coupled to the multiplexer output.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: November 16, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sunny Arora, Mukesh Bansal, Dipesh K. Gupta, Ankesh Jain, Gaurav Jain, Ritika Singh