Abstract: In a semiconductor device in which first and second transistors are configured so as to have the same electric characteristics as each other, a dummy gate is arranged between the first and second transistors in parallel to gates of the first and second transistors, and arrangement of source and drain regions formed on both sides of the gate of the first transistor, and arrangement of source and drain regions formed on both sides of the gate of the second transistor are the same as each other.

Abstract: A semiconductor device has isolated first layer interconnects, second layer interconnects, third layer interconnects, and through-holes each connecting one of the second layer interconnects and a corresponding one of the third layer interconnects together. The through-holes extend beyond the sides of the second layer interconnects to reach the isolated first layer interconnects and rest thereon. The through-holes are formed by a single etching step using a common glass pattern. The occupied area for the interconnects and the fabrication steps thereof can be reduced.