Patents by Inventor Ritsuko Tanaka

Ritsuko Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230156159
    Abstract: Provided is a non-transitory computer-readable recording medium storing a display program of a screen used to check videos captured by cameras, the display program causing a computer to execute a process, the process including analyzing the videos to identify a time period in which a target subject is captured in the videos, acquiring a reference position to be a reference for tracking the target subject, referring to a storage unit that stores information about respective positions in which the cameras are installed, and displaying display fields, which correspond to the cameras, respectively, in order of distances between each of the cameras and the reference position, each of the display fields displaying information about the time period in which the target subject is captured in a video from a corresponding one of the cameras.
    Type: Application
    Filed: July 13, 2022
    Publication date: May 18, 2023
    Applicant: FUJITSU LIMITED
    Inventors: Ritsuko Tanaka, Tomokazu Ishikawa
  • Patent number: 8497937
    Abstract: To enable a progressive synthesization process suited to each video signal even in such a case that a difference between video signals based on a video transmission sequence and the video signals not based on the video transmission sequence, is fuzzy.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: July 30, 2013
    Assignee: Fujitsu Limited
    Inventors: Teruyuki Satou, Hideki Matsuoka, Ritsuko Tanaka
  • Patent number: 7415550
    Abstract: A data transfer control system that can change the way of DMA transfers to meet the requirements of each application. The data transfer control system includes a DMA controller (DMAC) and a DMAC memory dedicated for DMA control purposes. The DMAC performs DMA transfers according to a DMA program stored in the DMAC memory. Each time a new DMA request is received, the DMAC saves its parameters in a DMA request parameter table, and each DMA request parameter table is registered with a DMA request management table. In this way, the received DMA requests are queued in the DMA request management table. They are executed in a first-in first-out fashion. The progress of ongoing DMA transfers are managed in a DMA channel status table disposed for each DMA channel.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: August 19, 2008
    Assignee: Fujitsu Limited
    Inventors: Ryuta Tanaka, Toru Tsuruta, Ritsuko Tanaka, Norichika Kumamoto
  • Publication number: 20080024668
    Abstract: A film determining unit determines whether input image data are originated from a film source. A controller determines a strength at which noise is to be eliminated from the image data based on the result of determination made by the film determining unit. A noise eliminating unit eliminates noise from the image data based on the strength determined by the controller. Specifically, when image data are originated from film-recorded images, the noise elimination strength is decreased so that film grains included in the image data are preserved.
    Type: Application
    Filed: December 28, 2006
    Publication date: January 31, 2008
    Inventors: Ritsuko Tanaka, Takashi Hamano
  • Publication number: 20070252894
    Abstract: To enable a progressive synthesization process suited to each video signal even in such a case that a difference between video signals based on a video transmission sequence and the video signals not based on the video transmission sequence, is fuzzy.
    Type: Application
    Filed: April 18, 2007
    Publication date: November 1, 2007
    Inventors: Teruyuki Satou, Hideki Matsuoka, Ritsuko Tanaka
  • Patent number: 7269831
    Abstract: The present invention relates to a multiprocessor system, which comprises two or more processor elements to be executed by a common program, a control section for switching such plural processor elements one from another for execution by the common program, and a storing section storing handover information relating to the common program which information is to be handover from the one processor element to the another processor element. This not only optimizes each of the functions of the processor elements, but also achieves certain delivery or interchange of the information between these process or elements, and even reduces the power consumption.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: September 11, 2007
    Assignee: Fujitsu Limited
    Inventors: Ryuta Tanaka, Norichika Kumamoto, Toru Tsuruta, Ritsuko Tanaka, Nobuyuki Iwasaki, Teruo Ishihara
  • Publication number: 20050223136
    Abstract: A data transfer control system that can change the way of DMA transfers to meet the requirements of each application. The data transfer control system includes a DMA controller (DMAC) and a DMAC memory dedicated for DMA control purposes. The DMAC performs DMA transfers according to a DMA program stored in the DMAC memory. Each time a new DMA request is received, the DMAC saves its parameters in a DMA request parameter table, and each DMA request parameter table is registered with a DMA request management table. In this way, the received DMA requests are queued in the DMA request management table. They are executed in a first-in first-out fashion. The progress of ongoing DMA transfers are managed in a DMA channel status table disposed for each DMA channel.
    Type: Application
    Filed: June 1, 2005
    Publication date: October 6, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Ryuta Tanaka, Toru Tsuruta, Ritsuko Tanaka, Norichika Kumamoto
  • Publication number: 20030036955
    Abstract: A newspaper dealer server is provided with at least a contractor data base that registers contractors who have subscriber contracts with a newspaper dealer. An advertisement preparation unit of the server prepares an advertisement that is requested from an advertiser, and places it in an advertisement Web page. Upon finding that a user is a contractor on the contractor data base through an input of the user information, an advertisement utilization unit of the server publicizes the advertisement Web page and allows the user to view it.
    Type: Application
    Filed: December 5, 2001
    Publication date: February 20, 2003
    Applicant: Fujitsu Limited
    Inventors: Ritsuko Tanaka, Toru Tsuruta, Norichika Kumamoto, Ryuta Tanaka
  • Publication number: 20020144086
    Abstract: The present invention relates to a multiprocessor system, which comprises two or more processor elements to be executed by a common program, a control section for switching such plural processor elements one from another for execution by the common program, and a storing section storing handover information relating to the common program which information is to be handover from the one processor element to the another processor element. This not only optimizes each of the functions of the processor elements, but also achieves certain delivery or interchange of the information between these process or elements, and even reduces the power consumption.
    Type: Application
    Filed: November 16, 2001
    Publication date: October 3, 2002
    Applicant: Fujtisu Limited
    Inventors: Ryuta Tanaka, Norichika Kumamoto, Toru Tsuruta, Ritsuko Tanaka, Nobuyuki Iwasaki, Teruo Ishihara
  • Patent number: 6292881
    Abstract: A microprocessor capable of executing a process instruction having at least one RISC type instruction is constructed to include an instruction decoding section for decoding a microcode including information which indicates transfer contents of input and output data and address information which indicates a storage location of the process instruction, a data reading section for reading input data corresponding to the information which indicates the transfer contents of the input and output data decoded by the instruction decoding section and reading the process instruction corresponding to the address information, and an operation process executing section for implementing one or a plurality of operation unit resources capable of executing an operation process according to the input data read by the data reading section and the process instruction.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: September 18, 2001
    Assignee: Fujitsu Limited
    Inventors: Ritsuko Tanaka, Yuji Nomura, Toru Tsuruta, Nobuyuki Iwasaki