Abstract: Methods and coarse depth test logic perform coarse depth testing in a graphics processing system in which a rendering space is divided into a plurality of tiles. A depth range for a tile identifies a depth range based on primitives previously processed. A determination is made based on the depth range for the tile as to whether all or a portion of a primitive is hidden in the tile. If at least a portion of the primitive is not hidden in the tile, a determination is made as to whether the primitive or a primitive fragment thereof has better depth than the primitives previously processed for the tile. If so, the primitive or the primitive fragment is identified as not requiring a read of a depth buffer to perform full resolution depth testing, such that a determination that at least a portion of the primitive is hidden in the tile causes full resolution depth testing not to be performed on at least that portion of the primitive.

Abstract: A system and method for implementing a computer-aided event history calendar includes computer component systems for storing, processing, displaying, and entering the event history calendar data. Recall of retrospective, autobiographical use of consumer products or substance exposure is facilitated in the context of an event history calendar whereby a respondent is asked questions concerning the occurrence and timing of various important life events throughout the respondent's life. Questions are asked regarding the respondent's usage of particular consumer products or exposures to substances as well as the sources of those products or substances. To assist the respondent in recalling the specific sources of consumer products or substances, source-identifying features of various possible consumer products the respondent may have used or substances the respondent may have been exposed to are displayed to the user.

Abstract: A circuit for monitoring digital data comprises a shift register for receiving the data to be monitored, the outputs of the shift register being fed either directly to the inputs of memory devices or via controllable gates. The memories are programmed to detect the number of logical `ones` present in the shift register, and the detected number is compared with a reference to determine whether the data should be accepted or rejected. In one mode of operation, the controllable gates alter the inputs to the memories such that they are all the same when the correct data is in the shift register. In another mode of operation, the gates supply the memories with unaltered data and the circuit can detect errors because the data is coded in such a manner that each block of data should contain the same number of digits and the same number of logical `ones`.

Abstract: A digital processing system is disclosed, including an analog to digital converter for converting an analog signal into digital signals in the form of words each made up of a plurality of binary digits, and an encoding device for transforming the digital signals into digital words each having a predetermined number of identical binary digits.