Patents by Inventor Robert A. Bourdelaise

Robert A. Bourdelaise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7281412
    Abstract: A high-temperature seal having in-situ integrity monitoring capability includes a quantity of dielectric material sealing an interface between adjacent structures and an electrical transmission line embedded within the dielectric material. A signal injection port is provided for exciting the transmission line with an excitation signal. One or more sample ports are provided for sampling the transmission line to obtain signal samples resulting from the excitation signal. The sample port(s) are adapted for connection to a signal analyzer adapted to analyze the signal samples for indications of seal integrity problems. Using a technique such as time domain reflectometry or frequency response analysis, the transmission line can be monitored for changes in characteristic impedance due to changes in seal dielectric constant and/or disruption of the transmission line.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: October 16, 2007
    Inventors: John A. Olenick, Timothy J. Curry, Robert A. Bourdelaise, Eli A. Richards, Paul A. Vichot, Barry E. Grabow, Samuel F. Wilderson
  • Publication number: 20070051193
    Abstract: A high-temperature seal having in-situ integrity monitoring capability includes a quantity of dielectric material sealing an interface between adjacent structures and an electrical transmission line embedded within the dielectric material. A signal injection port is provided for exciting the transmission line with an excitation signal. One or more sample ports are provided for sampling the transmission line to obtain signal samples resulting from the excitation signal. The sample port(s) are adapted for connection to a signal analyzer adapted to analyze the signal samples for indications of seal integrity problems. Using a technique such as time domain reflectometry or frequency response analysis, the transmission line can be monitored for changes in characteristic impedance due to changes in seal dielectric constant and/or disruption of the transmission line.
    Type: Application
    Filed: September 8, 2005
    Publication date: March 8, 2007
    Inventors: John Olenick, Timothy Curry, Robert Bourdelaise, Eli Richards, Paul Vichot, Barry Grabow, Samuel Wilderson
  • Patent number: 5469331
    Abstract: A high density electric power supply device formed by stacked circuit modules including top, bottom and intermediate modules, each of the modules having electrical contact elements retained in engagement with complementing contact elements on an adjacent one of the stacked modules under a force having a direction to press the top and bottom modules against the intermediate modules. Each of at least the intermediate modules have supply and return ports parallel to the direction of the aforementioned force and at least some of the modules having a passageway for circulation of cooling fluid between the supply and return ports therein. An elastic seal circumscribes each of said supply and return ports on at least the intermediate modules for maintaining a continuous fluid-tight passageway through the supply and return ports among the stacked circuit modules, the elastic seals being maintained under compression by the compressing force.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: November 21, 1995
    Inventors: Harry E. Conway, Robert A. Bourdelaise
  • Patent number: 5395249
    Abstract: A backplane connector system for electrically interconnecting an electronic module to a backplane assembly using a solder-free technique is described. A plurality of mating pads of conductive material are positioned on the surface of the backplane as a system interface. A corresponding series of plunger contacts are embedded in rows of cavities within a single connector body. At least one button spring having an elastic response to deformation is positioned within the cavities and touches the plunger contacts. The connector body, which has a variety of configurations, is attached to either the electronic module or to the backplane assembly. Upon installation of the electronic module into the backplane assembly, the plunger contacts depress into the button springs. The elastic response of the button springs holds the connection in compression and forms a compliant, solder-free, electrical interface.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: March 7, 1995
    Assignee: Westinghouse Electric Corporation
    Inventors: John C. Reynolds, Robert A. Bourdelaise, Bruce N. Lenderking
  • Patent number: 5298686
    Abstract: Both a system and method is provided for implementing a wiring change with respect to an electrical component detachably connected to a solderless PWB module. The system comprises at least one unused via on the PWB, an insulator used for electrically disconnecting a selected contact pad of the component from a contact pad disposed on the PWB, and a metallic strip mounted on a substrate for electrically connecting the selected component contact pad to the unused via. In one embodiment of the system, the substrate used to support the conductive strip is the compliant, insulative sheet material used in the interface that normally interconnects the pads of the electrical component with the pads of the PWB module. Alternatively, a separate "smart" layer formed from a thin insulative sheet material may be used to support the conductive strip.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: March 29, 1994
    Assignee: Westinghouse Electric Corp.
    Inventors: Robert A. Bourdelaise, David B. Harris, David R. King, Guy N. Hurst
  • Patent number: 5109320
    Abstract: Both a system and a method are provided for electrically and mechanically connecting at least one integrated circuit die to a solderless printed wiring board of the type which uses connecting interfaces which include an array of resilient electrical connector means held within a sheet of compliant, insulating material. The system of the invention generally comprises a fanout interface formed from a sheet of insulating material integrally connected to the side of an integrated circuit die that includes the bond pads associated with such dies, wherein the fanout interface includes an internal array of contact pads that are connected to the bond pads of the die, and an external array of contact pads on its exterior surface which are advantageously spaced farther apart than the bond pads of the die.
    Type: Grant
    Filed: December 24, 1990
    Date of Patent: April 28, 1992
    Assignee: Westinghouse Electric Corp.
    Inventors: Robert A. Bourdelaise, Denise B. Harris, David B. Harris, Victor J. Brzozowski
  • Patent number: 5027191
    Abstract: The invention is an improved chip carrier assembly utilizing a cavity-down chip carrier with a pad grid array wherein the IC chip within the chip carrier is mounted against a surface opposite the PWB to which the chip carrier is attached such that heat transfer from the IC chip may occur along a short path to a heat sink such that a large heat transfer rate is possible. Furthermore, the apparatus utilizes an alignment and electrical connection means between the contact pads of the chip carrier and a PWB to which the chip carrier is attached to compensate for shrinkage variation which occurs during the chip carrier fabrication process. Furthermore, within the cavity of the chip carrier there is space for additional components such as a decoupling capacitors. This permits the design of an apparatus providing better heat transfer properties, more accurate contact pad locations and the option of including within the chip carrier components which in the past had been mounted outside of the chip carrier.
    Type: Grant
    Filed: May 11, 1989
    Date of Patent: June 25, 1991
    Assignee: Westinghouse Electric Corp.
    Inventors: Robert A. Bourdelaise, David B. Harris, Denise B. Harris, John A. Olenick
  • Patent number: 4933808
    Abstract: A solderless printed wiring board module for receiving and securing surface mounted solderless electronic component carrier and electronic components without carrier upon a printed wiring board, the module also providing a heat transfer path to a surface away from the printed wiring board and the module further adaptable to electrical and mechanical attachment to similar modules placed adjacent to said module to form a multi-module assembly.
    Type: Grant
    Filed: May 11, 1989
    Date of Patent: June 12, 1990
    Assignee: Westinghouse Electric Corp.
    Inventors: Roald N. Horton, David B. Harris, Robert A. Bourdelaise