Abstract: Provided herein, in some embodiments, are methods and compositions for treatment of subjects with ?-thalassemia and subjects with severe sickle cell disease using autologous CRISPR-Cas9 modified CD34+ human hematopoietic stem and progenitor cells.

Abstract: An individual can upload media objects to a server and specify a manner in which the media objects are to be played as a media program to an end user. The media program can be provided to the end user via a synthetic channel, which can be tuned to by the end user as if tuning to a conventional television broadcast channel. Information related to the synthetic channel such as media program listings, can be provided in an electronic program guide. If a client terminal of the end user is tuned to the synthetic channel, the media program(s) scheduled by the individual who uploaded the media objects are streamed to the client terminal for viewing by the end user.

Abstract: An individual can upload media objects to a server and specify a manner in which the media objects are to be played as a media program to an end user. The media program can be provided to the end user via a synthetic channel, which can be tuned to by the end user as if tuning to a conventional television broadcast channel. Information related to the synthetic channel such as media program listings, can be provided in an electronic program guide. If a client terminal of the end user is tuned to the synthetic channel, the media program(s) scheduled by the individual who uploaded the media objects are streamed to the client terminal for viewing by the end user.

Abstract: An apparatus is provided for collecting state information associated with an execution path of recently processed instructions in a processor pipeline of a computer system. The apparatus identifies a class of instructions to be sampled. Path-identifying state information of a currently processed instruction is sampled when the currently processed instruction belongs to the identified class of instructions. A shift register stores a predetermined number of entries storing selected state information, the shift register is simultaneously sampled along with additional state information about the instruction being executed at the time of sampling.

Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an interleaved-fin connector is provided. The connector comprises first and second substrates. The first substrate includes a first surface. A plurality of first channels are etched on the first surface to form a plurality of first fins and a first base. The first base can be thermally engaged with the heat source. The second substrate includes a second surface having a plurality of second channels etched therein. The second channels form a plurality of second fins and a second base. The second base can be thermally engaged with the heat sink. The first and second fins providing a thermally conductive path from the heat source to the heat sink when interleaved with each other.

Abstract: A method is provided for estimating execution rates of program executions paths. The method samples path-identifying state information of selected instructions while executing the program in a processor. A control flow graph of the program is supplied, the control flow graph includes a plurality of path segments. The control flow graph is analyzed using the path-identifying state information to identify a set of path segments that are consistent with the sampled state information. The set of paths segments can be counted to determine their relative execution frequencies.

Abstract: In order to provide a thermal coupling between a heat source and a heat sink, an interleaved-fin connector is provided. The connector comprises first and second substrates. The first substrate includes a first surface. A plurality of first channels are etched on the first surface to form a plurality of first fins and a first base. The first base can be thermally engaged with the heat source. The second substrate includes a second surface having a plurality of second channels etched therein. The second channels form a plurality of second fins and a second base. The second base can be thermally engaged with the heat sink. The first and second fins providing a thermally conductive path from the heat source to the heat sink when interleaved with each other.

Abstract: A memory monitoring system equips a computer program for monitoring its own memory accesses. The system employs special values, called "VALUEA" and "VALUEB," stored in the memory locations and a table of write tags, each preferably a single-bit flag corresponding to a different one of the memory's locations. If the write tag is not set for a particular memory location, VALUEA within that location indicates that it is unallocated, and VALUEB indicates that it is allocated and not initialized. The write tags can be set to indicate that the corresponding memory location contains written data. The program so equipped can monitor each memory access, including, e.g., allocation, write, read, and memory freeing operations, using the combination of the location contents and the write tag table to determine valid memory operations and to signal memory access violations. Counters can be provided to track the number of valid accesses of particular types and/or of valid accesses to particular locations.

Abstract: A program for monitoring computer system performance includes a collection of source code modules in the form of a high level language. Each of the source code modules is compiled into a corresponding object code module. The object code modules are translated into a single linked code module in the form of a machine independent register transfer language. The linked code module is partitioned into basic program components. The basic program components include procedures, basic blocks within procedures, and instructions within basic blocks. Fundamental instrumentation routines identify, locate, and modify specific program components to be monitored. The modified linked code module is converted to machine executable code to be executed in the computer system so that performance data can be collected while the program is executing in the computer.

Abstract: A fast binary reduction tree of the type used in high speed digital computer multiplication circuits is disclosed having chunky adders formed by sub-dividing carry propagate adders into chunks of equal bit length such that chunk addition can be initiated in parallel. In the tree, chunky adders with the same chunk size and offset can be cascaded by connecting the carry-outs of one adder to the carry-ins of another, while carry-outs from adders having different offsets can be interleaved to form new partial product terms for input to the next adder level. The chunky adder tree reduces the number of levels without significantly increasing the computation time at each level, thereby increasing the overall computational speed of the circuit.