Patents by Inventor Robert A. Floyd
Robert A. Floyd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11705089Abstract: A system includes a spatial light modulator (SLM) configured to project an image. The system also includes a controller coupled to the SLM. The controller is configured to receive the image and determine a brightness level of the image. The controller is also configured to enforce a brightness limit on the image responsive to the brightness level, to produce a reduced image. The controller is configured to instruct a display to display the reduced image.Type: GrantFiled: April 7, 2021Date of Patent: July 18, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Robert Floyd Payne, Harsh Dinesh Jhaveri, Jeffrey Matthew Kempf
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Patent number: 11671138Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.Type: GrantFiled: September 29, 2021Date of Patent: June 6, 2023Assignee: Texas Instruments IncorporatedInventors: RR Manikandan, Kumar Anurag Shrivastava, Robert Floyd Payne, Anant Shankar Kamath, Swaminathan Sankaran, Kishalay Datta, Siraj Akhtar, Mark Edward Wentroble, Suvadip Banerjee, Rakesh Hariharan, Gurumurti Kailaschandra Avhad
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Publication number: 20230025757Abstract: In described examples, an integrated circuit includes an on-off keying (OOK) digital isolator, which includes a first circuitry, a multiplexer, an OOK modulator, an isolation barrier, an OOK envelope detector, and a second circuitry. The first circuitry generates and outputs a calibration signal. The multiplexer has a data signal input, and an input coupled to a first circuitry output. An OOK modulator input is coupled to a multiplexer output. An isolation barrier input is coupled to an OOK modulator output. An OOK envelope detector input is coupled to an isolation barrier output. The second circuitry includes an input coupled to an OOK envelope detector output, and an output coupled to an OOK envelope detector control input. The second circuitry detects a duty cycle distortion (DCD) of the OOK envelope detector output, and outputs a control signal to change the OOK envelope detector output's duty cycle based on the detected DCD.Type: ApplicationFiled: September 29, 2021Publication date: January 26, 2023Inventors: RR Manikandan, Kumar Anurag Shrivastava, Robert Floyd Payne, Anant Shankar Kamath, Swaminathan Sankaran, Kishalay Datta, Siraj Akhtar, Mark Edward Wentroble, Suvadip Banerjee, Rakesh Hariharan, Gurumurti Kailaschandra Avhad
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Publication number: 20220342202Abstract: A calibration circuit providing a programmable voltage generator that is selectively connectable to a first capacitor plate of a capacitive structure to supply a voltage thereto. A reference voltage generator is coupled to the output of the programmable voltage generator and generates a reference voltage. A comparator receives the reference voltage and a discharging voltage from the capacitive structure during a discharge period and, based on those inputs, generates a signal that is output to a digital controller. A constant current source is selectively connectable to the capacitive structure to generate a constant current. Based on the output of the comparator, the constant current, and a count representing a time during which the discharging voltage decreases, the digital controller measures capacitance to calibrate a movable mirror of the capacitive structure. During calibration, the digital controller controls the programmable voltage generator and a second capacitor plate of the capacitive structure.Type: ApplicationFiled: April 26, 2021Publication date: October 27, 2022Inventors: Robert Floyd Payne, James Norman Hall
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Patent number: 11322217Abstract: A track and hold circuit includes a signal input terminal, a clock input terminal, an output terminal, a transistor, and a bootstrapping circuit with a transformer. The transistor includes a source, a drain, and a gate, where the source is coupled to the signal input terminal, and the drain is coupled to the output terminal. The transformer includes a primary winding coupled to the clock input terminal, and a secondary winding. The secondary winding is coupled between the source and the gate to control a gate-source voltage of the transistor.Type: GrantFiled: August 26, 2020Date of Patent: May 3, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ashwin Raghunathan, Marco Corsi, Baher Haroun, Seyed Miaad Seyed Aliroteh, Swaminathan Sankaran, Robert Floyd Payne
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Publication number: 20210312885Abstract: A system includes a spatial light modulator (SLM) configured to project an image. The system also includes a controller coupled to the SLM. The controller is configured to receive the image and determine a brightness level of the image. The controller is also configured to enforce a brightness limit on the image responsive to the brightness level, to produce a reduced image. The controller is configured to instruct a display to display the reduced image.Type: ApplicationFiled: April 7, 2021Publication date: October 7, 2021Inventors: Robert Floyd PAYNE, Harsh Dinesh JHAVERI, Jeffrey Matthew KEMPF
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Publication number: 20210065830Abstract: A track and hold circuit includes a signal input terminal, a clock input terminal, an output terminal, a transistor, and a bootstrapping circuit with a transformer. The transistor includes a source, a drain, and a gate, where the source is coupled to the signal input terminal, and the drain is coupled to the output terminal. The transformer includes a primary winding coupled to the clock input terminal, and a secondary winding. The secondary winding is coupled between the source and the gate to control a gate-source voltage of the transistor.Type: ApplicationFiled: August 26, 2020Publication date: March 4, 2021Applicant: Texas Instruments IncorporatedInventors: Ashwin Raghunathan, Marco Corsi, Baher Haroun, Seyed Miaad Seyed Aliroteh, Swaminathan Sankaran, Robert Floyd Payne
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Patent number: 10659059Abstract: A multi-phase clock circuit includes a first delay circuit, a second delay circuit, a third delay circuit, a first clock mixer circuit, and a second clock mixer circuit. The first, second, and third delay circuits are coupled in series. The first clock mixer circuit includes a first input and a second input. The first input is coupled to an output of the first delay circuit. The second input is coupled to an output of the second delay circuit. The second clock mixer circuit also includes a first input and a second input. The first input of the second clock mixer circuit is coupled to an output of the second delay circuit. The second input of the second clock mixer circuit is coupled to an output of the third delay circuit.Type: GrantFiled: June 27, 2019Date of Patent: May 19, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Robert Floyd Payne, Olga Pavlovna Pope
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Publication number: 20200106450Abstract: A multi-phase clock circuit includes a first delay circuit, a second delay circuit, a third delay circuit, a first clock mixer circuit, and a second clock mixer circuit. The first, second, and third delay circuits are coupled in series. The first clock mixer circuit includes a first input and a second input. The first input is coupled to an output of the first delay circuit. The second input is coupled to an output of the second delay circuit. The second clock mixer circuit also includes a first input and a second input. The first input of the second clock mixer circuit is coupled to an output of the second delay circuit. The second input of the second clock mixer circuit is coupled to an output of the third delay circuit.Type: ApplicationFiled: June 27, 2019Publication date: April 2, 2020Inventors: Robert Floyd PAYNE, Olga Pavlovna POPE
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Patent number: 10555915Abstract: The current invention provides methods and compositions for treating sensorineural hearing loss including but not limited to acute acoustic trauma (AAT). The composition 2,4-disulfonyl ?-phenyl tertiary butyl nitrone and N-acetylcysteine (NAC). Preferably, the compositions for treating AAT will be administered orally. However, other methods which deliver the compositions for treating AAT systemically to the body should work equally well.Type: GrantFiled: August 24, 2010Date of Patent: February 11, 2020Assignees: Hough Ear Institute, Oklahoma Medical Research FoundationInventors: Richard Dana Kopke, Robert A. Floyd
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Patent number: 10547297Abstract: A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.Type: GrantFiled: May 13, 2019Date of Patent: January 28, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mohammad Elbadry, Robert Floyd Payne, Gerd Schuppener
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Patent number: 10528075Abstract: Transmitter circuitry transmits: a first voltage as the return-to-zero signal that is higher than a first positive threshold, the first voltage being decodable to a first order of data bits; a second voltage as a return-to-zero signal that is between a second positive threshold and the first positive threshold, the second voltage being decodable to a second order of the data bits, and the second positive threshold being lower than the first positive threshold; a third voltage as the return-to-zero signal that is between a first negative threshold and a second negative threshold, the third voltage being decodable to a third order of the data bits, and the second negative threshold being higher than the first negative threshold; and a fourth voltage as the return-to-zero signal that is lower than the first negative threshold, the fourth voltage being decodable to a fourth order of the data bits.Type: GrantFiled: November 19, 2018Date of Patent: January 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Robert Floyd Payne
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Patent number: 10483609Abstract: A digital system has a dielectric core waveguide that is formed within a multilayer substrate. The dielectric waveguide has a longitudinal dielectric core member formed in the core layer having two adjacent longitudinal sides each separated from the core layer by a corresponding slot portion formed in the core layer The dielectric core member has the first dielectric constant value. A cladding surrounds the dielectric core member formed by a top layer and the bottom layer infilling the slot portions of the core layer. The cladding has a dielectric constant value that is lower than the first dielectric constant value.Type: GrantFiled: June 6, 2017Date of Patent: November 19, 2019Assignee: Texas Instruments IncorporatedInventors: Robert Floyd Payne, Gerd Schuppener, Juan Alejandro Herbsommer
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Patent number: 10416095Abstract: A dielectric waveguide (DWG) may be used to identify a composition of a material that is in contact with the DWG. A radio frequency (RF) signal is transmitted into a dielectric waveguide located in contact with the material. The RF signal is received after it passes through the DWG. An insertion loss of the DWG is determined. The presence of the material may be inferred when the insertion loss exceeds a threshold value. The composition of the material may be inferred based on a correlation with the insertion loss. Alternatively, a volume of the material may be inferred based on a correlation with the insertion loss.Type: GrantFiled: June 29, 2018Date of Patent: September 17, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Juan Alejandro Herbsommer, Robert Floyd Payne
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Patent number: 10411876Abstract: A digital receiver for decoding input data having three states includes a first input coupled to a first data line, a second input coupled to a second data line, a third input coupled to a third data line, and a fourth input coupled to a fourth data line. A first decoder is coupled to a first output, wherein the first decoder is for outputting first data signals in response to the sign of input data on the first data line minus input data on the second line. A second decoder is coupled to a second output, wherein the second decoder is for outputting second data signals in response to the sign of input data on the third data line minus input data on the fourth data line.Type: GrantFiled: December 6, 2017Date of Patent: September 10, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Robert Floyd Payne
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Patent number: 10398659Abstract: The present invention involves the use of 2,4-disulfonyl phenyl tert-butyl nitrone (2,4-ds-PBN) in the treatment and prevention of gliomas. The 2,4-ds-PBN may be used alone or combined with other traditional chemo- and radiotherapies and surgery, to treat or prevent glioma occurrence, recurrence, spread, growth, metastasis, or vascularization.Type: GrantFiled: April 12, 2018Date of Patent: September 3, 2019Assignee: OKLAHOMA MEDICAL RESEARCH FOUNDATIONInventors: Rheal A. Towner, Robert A. Floyd
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Publication number: 20190267979Abstract: A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.Type: ApplicationFiled: May 13, 2019Publication date: August 29, 2019Inventors: Mohammad Elbadry, Robert Floyd Payne, Gerd Schuppener
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Patent number: 10291218Abstract: A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.Type: GrantFiled: June 29, 2018Date of Patent: May 14, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mohammad Elbadry, Robert Floyd Payne, Gerd Schuppener
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Publication number: 20190086947Abstract: Transmitter circuitry transmits: a first voltage as the return-to-zero signal that is higher than a first positive threshold, the first voltage being decodable to a first order of data bits; a second voltage as a return-to-zero signal that is between a second positive threshold and the first positive threshold, the second voltage being decodable to a second order of the data bits, and the second positive threshold being lower than the first positive threshold; a third voltage as the return-to-zero signal that is between a first negative threshold and a second negative threshold, the third voltage being decodable to a third order of the data bits, and the second negative threshold being higher than the first negative threshold; and a fourth voltage as the return-to-zero signal that is lower than the first negative threshold, the fourth voltage being decodable to a fourth order of the data bits.Type: ApplicationFiled: November 19, 2018Publication date: March 21, 2019Inventor: Robert Floyd Payne
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Patent number: 10220251Abstract: A device that is used to extend the spine and put it in traction, that is portable and user friendly. The device in an embodiment is grasped by the handles on either side and then is pushed toward the lower leg and against the upper calves via vertical intermediary bar pushing the legs with a horizontal bar in one direction and the shoulders in the other. The described process stretching the spine and putting the back in traction for the purposes of pain relief and stretching of the back muscles. The device can be an inexpensive alternative to other devices, as well as, easier to use. The force placed on the device and therefore on the spine or back is controlled by the user as is the ability to stop quite quickly if pain were to arise, giving the user complete and instant control.Type: GrantFiled: February 22, 2018Date of Patent: March 5, 2019Inventor: Robert Floyd Cullison