Abstract: A pool cue case caddy for carrying and securing a pool cue case includes a frame comprising a pair of parallel bars and a handle. A base is coupled to a bottom end of each of the bars and perpendicularly extends forward to support a pool cue case. A support comprises a pair of legs pivotably coupled to the pair of bars and a foot extending between a distal end of each of the legs. The support has a folded position extending towards the top end of the frame and an alternate extended position with the foot contacting the ground and the legs maintaining the frame in a vertical position. A pair of wheels is coupled adjacent the bottom end of each of the pair of bars.

Abstract: A semiconductor chip is so designed that the signal and power terminals are brought to one edge of the integrated circuit chip. The integrated circuit chip is then mounted vertically on a substrate which provides signal interconnection and power distribution to the integrated circuit chips as well as a thermal path for conducting heat away from the chips. The electrical connection from the semiconductor chip to the substrate may be by solder reflow or thermal compression bonding techniques. The package is particularly advantageous for memory integrated circuit chips. The vertical integrated circuit chips may alternatively be carried by a tape carrier which is formed into a convoluted form with all integrated circuit chips positioned substantially vertically thereon.

Abstract: A high speed, unity gain, emitter follower OR circuit is disclosed including first and second pairs of emitter-connected complementary bipolar transistors with the bases of the NPN transistors being connected together and the bases of the PNP transistors being connected commonly to an input line. One of the NPN transistors id diode-connected (base to collector). The emitter of the other NPN transistor is connected to an output terminal. The input line is connected to the emitters of a pair of OR input NPN transistors and to a first current source. A second current source is coupled to the diode-connected NPN transistor.

Abstract: A complementary bipolar transistor circuit characterized by the same output impedance for positive and negative input voltage transitions, only a single collector path delay between input and output for both senses of input voltage transitions and very low standby power consumption. Provision is made for simultaneously actuating an emitter follower series-connected first pair of complementary transistors with signals having voltage swings which are only a fraction of the V.sub.be necessary to forward bias each base-emitter diode of the first pair of transistors. The actuation is accomplished using a second pair of complementary transistors having collector electrodes connected to respective bases of the first pair of transistors of similar kind. One of the remaining electrodes of each of the second pair of transistors are connected to each other.In a driver circuit species of the invention, the bases of the second pair of transistors are connected to each other and receive the input signal.

Abstract: A semiconductor chip is so designed that the signal and power terminals are brought to one edge of the integrated circuit chip. The integrated circuit chip is then mounted vertically on a substrate which provides signal interconnection and power distribution to the integrated circuit chips as well as a thermal path for conducting heat away from the chips. The electrical connection from the semiconductor chip to the substrate may be by solder reflow or thermal compression bonding techniques. The package is particularly advantageous for memory integrated circuit chips. The vertical integrated circuit chips may alternatively be carried by a tape carrier which is formed into a convoluted form with all integrated circuit chips positioned substantially vertically thereon.

Abstract: A small variable resistor is used as a precision terminating resistor in an integrated circuit interconnection structure. The structure involves the use of a driver circuit connected to and driving a plurality of loads which are connected to a transmission line. The transmission line is terminated by the precision variable terminating resistor. The last load in the series of loads is located in the integrated circuit chip which has the variable terminating resistor. The absolute value of the variable resistor is difficult to control. The absolute value of any conventional integrated resistor is hard to control in manufacturing. However, by making the value of the resistance proportional to a voltage which itself is proportional to a deviation from a reference voltage, it is possible to obtain a much more precise value of resistance.