Patents by Inventor Robert A. Mayer

Robert A. Mayer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Throttling integrated link
    Patent number: 10241952
    Abstract: Methods and apparatus for throttling an interface that is integrated on the same die as a processor are described. In one embodiment, a signal from an Integrated Input/Output hub (e.g., integrated on the same die as a processor) causes throttling of a link coupled between the IIO and an Input/Output (IO) device. Other embodiments are also disclosed.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: March 26, 2019
    Assignee: Intel Corporation
    Inventors: Ravi Rajwar, Robert A. Mayer, Stephan J. Jourdan, Lily Pao Looi
  • THROTTLING INTEGRATED LINK
    Publication number: 20160085711
    Abstract: Methods and apparatus for throttling an interface that is integrated on the same die as a processor are described. In one embodiment, a signal from an Integrated Input/Output hub (e.g., integrated on the same die as a processor) causes throttling of a link coupled between the IIO and an Input/Output (IO) device. Other embodiments are also disclosed.
    Type: Application
    Filed: September 29, 2015
    Publication date: March 24, 2016
    Applicant: Intel Corporation
    Inventors: Ravi Rajwar, Robert A. Mayer, Stephan J. Jourdan, Lily Pao Looi
  • Throttling integrated link
    Patent number: 9146610
    Abstract: Methods and apparatus for throttling an interface that is integrated on the same die as a processor are described. In one embodiment, a signal from an Integrated Input/Output hub (e.g., integrated on the same die as a processor) causes throttling of a link coupled between the IIO and an Input/Output (IO) device. Other embodiments are also disclosed.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: September 29, 2015
    Assignee: Intel Corporation
    Inventors: Ravi Rajwar, Robert A. Mayer, Stephan J. Jourdan, Lily Pao Looi
  • Throttling integrated link
    Patent number: 9110666
    Abstract: Methods and apparatus for throttling an interface that is integrated on the same die as a processor are described. In one embodiment, a signal from an Integrated Input/Output hub (e.g., integrated on the same die as a processor) causes throttling of a link coupled between the IIO and an Input/Output (IO) device. Other embodiments are also disclosed.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: August 18, 2015
    Assignee: Intel Corporation
    Inventors: Ravi Rajwar, Robert A. Mayer, Stephan J. Jourdan, Lily Pao Looi
  • Throttling Integrated Link
    Publication number: 20120079159
    Abstract: Methods and apparatus for throttling an interface that is integrated on the same die as a processor are described. In one embodiment, a signal from an Integrated Input/Output hub (e.g., integrated on the same die as a processor) causes throttling of a link coupled between the IIO and an Input/Output (IO) device. Other embodiments are also disclosed.
    Type: Application
    Filed: March 4, 2011
    Publication date: March 29, 2012
    Inventors: Ravi Rajwar, Robert A. Mayer, Stephan J. Jourdan, Lily Pao Looi
  • System for recording the locations of workpiece defects
    Patent number: 4541011
    Abstract: A system for determining and recording the position, size, shape and depth of a defect in a billet or similar workpiece. The workpiece is displayed on the screen of a video display device, and the positions of the defects on the screen are recorded responsive to being manually selected by an operator. In embodiments in which the position of a video camera generating the video image varies with respect to the workpiece, sensors are used to determine the positions of the workpiece with respect to the camera. The position indications from the sensors are applied to a processor which correlates these indications with the position of the defect on the screen to determine the position of the defect on the workpiece.
    Type: Grant
    Filed: March 15, 1982
    Date of Patent: September 10, 1985
    Assignee: Western Gear Corporation
    Inventors: Robert A. Mayer, Michael W. Reith, Jack L. Odell, II