Patents by Inventor Robert A. Maynard

Robert A. Maynard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210117436
    Abstract: Methods, apparatuses, and systems for improving data mapping are provided. An example method may include retrieving a first plurality of data objects associated with a first database schema from a database, determining a first data classifier corresponding to the first database schema, generating a mapping specification based at least in part on the first data classifier and the first plurality of data objects, and generating a second plurality of data objects based at least in part on the first plurality of data objects and the mapping specification.
    Type: Application
    Filed: October 22, 2019
    Publication date: April 22, 2021
    Applicant: Honeywell International Inc.
    Inventors: Shawn Robert ZABEL, Siva RAPOLU, Neeraja SANJEEV ARCOT, Swetha SIDDALINGAPPA, Mehabube Rabbanee SHAIK, Charlotte Earle LOOMIS, Jesse GATELY, Robert Maynard GHENT, Vinatha BABYPRAKASH, Vojtech SOJKA
  • Publication number: 20180186302
    Abstract: An angular audio accessory for redirecting a speaker bar consists of a stationary U-channel, a collapsible U-channel, a hinging mechanism, and a clamping mechanism. The collapsible U-channel is hingedly connected to the stationary U-channel with the hinging mechanism. The configuration of the collapsible U-channel is determined with the clamping mechanism. When in use, the stationary U-channel is attached to a body of a vehicle. The speaker bar that needs to be redirected is connected to the collapsible U-channel. Thus, the speaker bar can be positioned in parallel to the stationary U-channel or perpendicular to the stationary U-channel.
    Type: Application
    Filed: January 4, 2018
    Publication date: July 5, 2018
    Inventors: Robert Maynard, Dirk Smith, Jacob Edwards
  • Publication number: 20150262129
    Abstract: Embodiments of the invention include an online profile system for a user related to building and accessing an online profile and process a verification report of a first user. In some embodiments, the verification report can be distributed to an internet service interface based on the user's judgment of the accuracy, an administrator. In some embodiments, the verification report can be distributed based on a renewal date of the verification. In some embodiments, the online profile system can process dispute information from the first user, and initiate a secondary search of the first user to produce a verification report of the user. In some embodiments, the user can be verified using knowledge based questions including timed answers. In some further embodiments, the system can flag a user account of the first user for a deactivated or hidden profile. In some embodiments, the internet service interface includes an internet dating service.
    Type: Application
    Filed: March 11, 2015
    Publication date: September 17, 2015
    Inventors: Robert Maynard, David Bradley Rust, Kimberly M. Henning
  • Publication number: 20080255049
    Abstract: The combination of low intensity pulsed ultrasound with administration of an osteogenic protein or proteins or their genes enhances bone repair in mammals. This combination avoids thermal activation of tissue repair mechanisms and allows the osteogenic protein or proteins or their genes to act at the site of bone fracture or lowered bone density to enhance or accelerate bone formation, thereby improving the prognosis of a patient. The combination may be used to treat fractures, to prevent or treat osteoporosis, to improve outcomes for bone replacement and to prevent or treat bone loss due to other physiologic disorders.
    Type: Application
    Filed: April 10, 2008
    Publication date: October 16, 2008
    Applicant: RUSH UNIVERSITY MEDICAL CENTER
    Inventors: Dale Richman Sumner, Amarjit Singh Virdi, Robert Maynard Leven
  • Patent number: 6841026
    Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. One embodiment of the reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: January 11, 2005
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Robert Blumberg, Robert Maynard Japp, William John Rudik, John Frank Surowka
  • Patent number: 6838400
    Abstract: The glass transmittance of UV light having a wavelength of 365 nanometers is reduced by compounding an oxide or salt of at least one of Fe, Cu, Cr, Ce, Mn and mixtures thereof. The fiberglass cloth can be used for providing reinforced prepregs used in producing printed circuit boards or laminated chip carrier substrates.
    Type: Grant
    Filed: March 23, 1998
    Date of Patent: January 4, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert Maynard Japp, Pamela Lulkoski, Jeffrey McKeveny, Jan Obrzut, Kenneth Lynn Potter
  • Patent number: 6586352
    Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structure comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: July 1, 2003
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Robert Blumberg, Robert Maynard Japp, William John Rudik, John Frank Surowka
  • Patent number: 6534179
    Abstract: A halogen-free dielectric resin mixture is described for use in microvia and other similar applications. The resin mixture contains a cyanate ester monomer or prepolymer a bismaleimide, an epoxy and a flame inhibiting compound selected from the group consisting of a phosphinic acid anhydride, a phosphonic acid andydride and a phosphonic acid half-ester. The flame inhibitor is present in an amount wherein the elemental phosphorus content is between about 2% and about 20% by weight, based on the weight of the resin mixture. The resin mixture can also include one or more coloring, fluorescent and UV absorbing agents. Prepregs based on the resin mixture with inorganic or organic reinforcing agents, as well as circuit boards and chip carriers made from the prepregs are also described. A resin coated article for use in microvia laser applications is likewise included.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: March 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Robert Maynard Japp, Konstantinos I. Papathomas, Mark D. Poliks
  • Publication number: 20030000081
    Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. One embodiment of the reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The method for making reduced CTE laminate and laminate structures comprises the following steps: providing non-woven quartz mat; providing a prepreg, preferably B-stage cured to not more than about 40%, preferably not more than 30% of full cure; sandwiching the non-woven quartz mat between two layers of prepreg, and reflowing the resin of the prepreg into the quartz mat.
    Type: Application
    Filed: March 26, 2002
    Publication date: January 2, 2003
    Applicant: International Business Machines Corporation
    Inventors: Lawrence Robert Blumberg, Robert Maynard Japp, William John Rudik, John Frank Surowka
  • Publication number: 20030003305
    Abstract: A halogen-free dielectric resin mixture is described for use in microvia and other similar applications. The resin mixture contains a cyanate ester monomer or prepolymer a bismaleimide, an epoxy and a flame inhibiting compound selected from the group consisting of a phosphinic acid anhydride, a phosphonic acid andydride and a phosphonic acid half-ester. The flame inhibitor is present in an amount wherein the elemental phosphorus content is between about 2% and about 20% by weight, based on the weight of the resin mixture. The resin mixture can also include one or more coloring, fluorescent and UV absorbing agents. Prepregs based on the resin mixture with inorganic or organic reinforcing agents, as well as circuit boards and chip carriers made from the prepregs are also described. A resin coated article for use in microvia laser applications is likewise included.
    Type: Application
    Filed: March 27, 2001
    Publication date: January 2, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert Maynard Japp, Konstantinos I. Papathomas, Mark D. Poliks
  • Publication number: 20020119849
    Abstract: A tool for manipulating bicycle drive chains having a central elongated portion with a first and second end formed to manipulate the drive chain while being held by the other end as a handle. On a first version, the first end is formed to grasp and pull the drive chain while the second end is formed to grasp and push the drive chain. Other versions of the tool provide for both ends to feature pulling ends, or both ends to feature pushing ends, or one end with a pushing or pulling end and the other end terminating as a straight element. Each version of the tool is fashioned to be small, compact and easily portable.
    Type: Application
    Filed: February 23, 2001
    Publication date: August 29, 2002
    Inventor: Robert Maynard
  • Patent number: 6387830
    Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: May 14, 2002
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Robert Blumberg, Robert Maynard Japp, William John Rudik, John Frank Surowka
  • Patent number: 6387205
    Abstract: A method for coating cloth especially fiberglass sheets with a thermosetting resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin/solvent mixture while maintaining at least some of the interstices or openings essentially free of the solvent mixture. This first coating is then partially cured to between about 70% and 90% of full cure. The coated fiberglass with partially cured resin thereon is then given a second coating of either the same or different thermosetting resin mixture which coats the first coating and fills in the interstices between the fibers. This second coating is then partially cured, which advances the cure of the first coating past 80% full cure and results in an impregnated fiberglass cloth structure for use as sticker sheets.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: May 14, 2002
    Assignee: International Business Machines Corporation
    Inventors: Bernd Karl Appelt, William Thomas Fotorny, Robert Maynard Japp, Kostantinos Papathomas, Mark David Poliks
  • Publication number: 20020044338
    Abstract: An apparatus for maintaining the temperature stability of an amplifier system comprises a device for heating, cooling or heating an cooling one or more sub-assemblies of the amplifier system, a temperature sensor for detecting variations in temperature of a sub-assembly, and a controller operably connecting the two. The signal from the sensor is used by the controller to adjust the amount of heating, cooling, or heating and cooling of a sub-assembly in order to maintain its temperature within a range sufficiently small to ensure stable performance.
    Type: Application
    Filed: April 23, 2001
    Publication date: April 18, 2002
    Inventors: David Ronald Walker, Yang Pang, Edward Frank Gabl, Robert Maynard, Charles Bogusch
  • Patent number: 6351030
    Abstract: The present invention is a method of providing a protective covering on an electronic package including a first circuitized substrate, a semiconductor chip positioned on and electrically coupled to the first substrate, and a plurality of conductors also on the substrate for electrically connecting the substrate to an external circuitized substrate. In one version, the method comprises covering substantially all of the external surfaces of the substrate, the semiconductor chip and a portion of the plurality of conductors with a protective covering from immersion in a dielectric solution (e.g., TEFLON AF). The coatings can also be applied by brushing, spraying, or chemical vapor deposition. In an alternative embodiment, all of the external surfaces, including all of the conductors, are coated with the protective covering (e.g., to facilitate package shipment or other handling). The resulting electronic packages are also described herein.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: February 26, 2002
    Assignee: International Business Machines Corporation
    Inventors: Ross Downey Havens, Robert Maynard Japp, Jeffrey Alan Knight, Mark David Poliks, Anne M. Quinn
  • Publication number: 20010011773
    Abstract: The present invention is a method of providing a protective covering on an electronic package including a first circuitized substrate, a semiconductor chip positioned on and electrically coupled to the first substrate, and a plurality of conductors also on the substrate for electrically connecting the substrate to an external circuitized substrate. In one version, the method comprises covering substantially all of the external surfaces of the substrate, the semiconductor chip and a portion of the plurality of conductors with a protective covering from immersion in a dielectric solution (e.g., TEFLON AF). The coatings can also be applied by brushing, spraying, or chemical vapor deposition. In an alternative embodiment, all of the external surfaces, including all of the conductors, are coated with the protective covering (e.g., to facilitate package shipment or other handling). The resulting electronic packages are also described herein.
    Type: Application
    Filed: March 25, 1999
    Publication date: August 9, 2001
    Inventors: ROSS DOWNEY HAVENS, ROBERT MAYNARD JAPP, JEFFREY ALAN KNIGHT, MARK DAVID POLIKS, ANNE M. QUINN, RONALD D. QUINN
  • Patent number: 6214525
    Abstract: The invention relates to subtractive and additive processes for creating a circuitized cavity in a printed circuit board. Additionally, the invention includes a circuitized cavity and a printed circuit board with a circuitized cavity. The circuitized cavity provides for a variety of advantages over wire bonds.
    Type: Grant
    Filed: August 24, 1999
    Date of Patent: April 10, 2001
    Assignee: International Business Machines Corp.
    Inventors: Christina Marie Boyko, Donald Seton Farquhar, Robert Maynard Japp, Michael Joseph Klodowski
  • Patent number: 6176985
    Abstract: An electroplating apparatus provides high current electrical connections in a small area to a workpiece. The contact area may use a dendrite surface to improve the connection. An insulative gasket prevents electroplating fluids from entering the region about the contact area. A heavy core laminated within a supporting structure provides uniform current distribution of high electrical currents to the dendrite covered contact areas.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventors: Francis J. Downes, Jr., Raymond Thomas Galasco, Robert Maynard Japp, John Frank Surowka
  • Patent number: 6136733
    Abstract: A simple, inexpensive, drillable, reduced CTE laminate and circuitized structures comprising the reduced CTE laminate, is provided. The reduced CTE laminate comprises: from about 40% to 75%, preferably from about 55% to 65%, by weight resin; from about 0.05% to 0.3%, preferably from about 0.08% to 0.10%, by weight curing agent; from about 25% to 60%, preferably from about 30% to 40%, by weight, woven cloth; from about 1% to 15%, preferably from about 5% to 10%, by volume, non-woven quartz mat. The present invention also generally relates to a method for reducing the CTE of circuitized structures, and to methods for making reduced CTE laminate and circuitized structures comprising reduced CTE laminate.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: October 24, 2000
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Robert Blumberg, Robert Maynard Japp, William John Rudik, John Frank Surowka
  • Patent number: 6096665
    Abstract: A method for coating cloth especially fiberglass sheets with a resin and resulting structure is provided. The coating is performed in two steps. In the first step, essentially all of the strands of the fiberglass are coated with the resin solvent mixture as well as most of the interstices or openings, although some of the interstices or openings have holes where the coating does not completely fill in. This first coating is then partially cured to the extent that it will not redissolve in a second coating of the same resin solution. The coated fiberglass with partially cured resin thereon is then given a second coating of the same resin mixture which coats the first coating and fills in any holes in the first coating. This second coating is then partially cured, which advances the cure of the first coating and results in an impregnated fiberglass cloth structure for use as sticker sheets. This substantially reduces pinholing.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: August 1, 2000
    Assignee: International Business Machines Corporation
    Inventors: Bernd Karl Appelt, Robert Maynard Japp, Kostantinos Papathomas, William John Rudik