Abstract: A technique wherein High Availability (HA) hardware is used to automatically validate control and configuration registers, e.g. automatically generate parity, detect parity errors, and report errors within software-written configuration and control registers of ASIC and IC products. Parity control logic and Masking Registers are utilized to facilitate automatic parity generation and subsequent parity error reporting. The specific location of where the error occurred can be stored to enable software to correct and/or reconfigure the registers. The HA hardware verifies the validity of control and configuration registers coupled to a bus, utilizing idle cycles in addition to valid bus cycles so there is no impact on system throughput.

Abstract: The present invention comprises a method and apparatus for the treatment of sleep apnea through the application of real-time, interactive positive airway pressure within the airway of a patient attached to the system. A single sensor is arranged in fluid communication with the airway of the air delivery conduit, and is designed to detect abnormal inspiratory flow to the patient's airway on a single breath basis. Output air pressure from the air source to the airway of the patient is continuously increased, instantaneously stopped, and slowly decreased in response to real-time changes in the patient's inspiratory flow curve detected and interpreted by this apparatus, thus providing the optimal pressure required to restore airway patency on each breath.