Abstract: An apparatus to facilitate weight lifting exercises is disclosed. The apparatus includes a palm plate having a hook portion configured to receive a weight bar. A detent is rotationally connected to the palm plate and configured to constrain the weight bar within the hook member in a closed position. An optional thumb lever may be connected to the detent to facilitate opening and closing the detent.

Abstract: An apparatus to facilitate weight lifting exercises is disclosed. The apparatus includes a palm plate having a hook portion configured to receive a weight bar. A detent is rotationally connected to the palm plate and configured to constrain the weight bar within the hook member in a closed position. An optional thumb lever may be connected to the detent to facilitate opening and closing the detent.

Abstract: A lens assembly includes a lens, a lens barrel, and a heater element. The lens has an inner surface and an outer surface. The lens barrel supports the lens and defines an optical axis, the lens arranged along the optical axis such that the inner surface of the lens is within the lens barrel and the outer surface of the lens is outside the lens barrel. The heater element is in intimate mechanical communication with the inner surface of the lens and has a heater element electrical lead extending radially therefrom to provide power to the heater element. Lens heating methods are also described.

Abstract: A lens assembly includes a lens, a lens barrel, and a heater element. The lens has an inner surface and an outer surface. The lens barrel supports the lens and defines an optical axis, the lens arranged along the optical axis such that the inner surface of the lens is within the lens barrel and the outer surface of the lens is outside the lens barrel. The heater element is in intimate mechanical communication with the inner surface of the lens and has a heater element electrical lead extending radially therefrom to provide power to the heater element. Lens heating methods are also described.

Abstract: A portable audio system with an integral hearing test is disclosed. The device includes a plurality of filter circuits. A processor applies a respective audio frequency to each filter circuit in a test mode to determine a respective gain based on a user input and applies the respective gain to each filter circuit in a normal mode. A switch circuit selects an audio signal from a plurality of sources in the normal mode. An analog-to-digital converter converts the selected audio signal to a digital signal and applies the digital signal to the plurality of filter circuits. A sum circuit receives a digital output signal from each of the plurality of filter circuits and produces a combined signal. A digital-to-analog converter converts the combined signal to an analog output signal.

Abstract: A portable audio system with an integral hearing test is disclosed. The device includes a plurality of filter circuits. A processor applies a respective audio frequency to each filter circuit in a test mode to determine a respective gain based on a user input and applies the respective gain to each filter circuit in a normal mode. A switch circuit selects an audio signal from a plurality of sources in the normal mode. An analog-to-digital converter converts the selected audio signal to a digital signal and applies the digital signal to the plurality of filter circuits. A sum circuit receives a digital output signal from each of the plurality of filter circuits and produces a combined signal. A digital-to-analog converter converts the combined signal to an analog output signal.

Abstract: An audio circuit with an integral hearing test is disclosed. The circuit includes at least one variable gain amplifier (VGA) coupled to receive an audio signal and a plurality of filters. Each filter is coupled to the at least one VGA and configured to filter an output signal from the at least one VGA. A processor is coupled to the VGAs and configured to apply a selected frequency to the at least one VGA in a test mode and to control a gain of the at least one VGA in a normal mode.

Abstract: An audio circuit with an integral hearing test is disclosed. The circuit includes at least one variable gain amplifier (VGA) coupled to receive an audio signal and a plurality of filters. Each filter is coupled to the at least one VGA and configured to filter an output signal from the at least one VGA. A processor is coupled to the VGAs and configured to apply a selected frequency to the at least one VGA in a test mode and to control a gain of the at least one VGA in a normal mode.

Abstract: An MRI image processing and analysis system may identify instances of structure in MRI flow data, e.g., coherency, derive contours and/or clinical markers based on the identified structures. The system may be remotely located from one or more MRI acquisition systems, and perform: perform error detection and/or correction on MRI data sets (e.g., phase error correction, phase aliasing, signal unwrapping, and/or on other artifacts); segmentation; visualization of flow (e.g., velocity, arterial versus venous flow, shunts) superimposed on anatomical structure, quantification; verification; and/or generation of patient specific 4-D flow protocols. An asynchronous command and imaging pipeline allows remote image processing and analysis in a timely and secure manner even with complicated or large medical imaging data sets and metadata.

Abstract: Apparatus for use with a camera module having an imager and adapted for mounting on the inside surface of a vehicle window. The apparatus comprising structures sized and positioned to block reflections that might otherwise impinge on the imager from below the module, while still permitting the flow of air onto the window surface within the imager's field of view.

Abstract: A micro electromechanical systems (MEMS) sensor is excited. The response of the MEMS sensor is measured. The MEMS sensor is calibrated.

Abstract: Apparatus for use with a camera module having an imager and adapted for mounting on the inside surface of a vehicle window. The apparatus comprising structures sized and positioned to block reflections that might otherwise impinge on the imager from below the module, while still permitting the flow of air onto the window surface within the imager's field of view.

Abstract: A system for making financial transfers between subscribers of a financial transfer service is disclosed. The system may include a receiving subscriber interface (RSI), a sending subscriber interface (SSI), and an agent server (AS). The RSI may be configured to accept a set of invoice information including an identifier of a destination account. The SSI may be configured to accept a set of payment information including an identifier of a source account. The AS may be configured to receive the set of invoice information and create an invoice based on the set of invoice information. The AS may also be configured to transmit the invoice and receive the set of payment information. The AS may also be configured to cause an amount of funds to be transferred from the source account on a source transfer network to the destination account on a destination transfer network via a primary transfer network.

Abstract: An electrostatic discharge (ESD) protection circuit is disclosed. The circuit includes a first region having a first conductivity type (410) is formed at a face of a substrate. A gate having a second conductivity type (406) is formed in the substrate beside the first region. A channel having the first conductivity type is formed below the first region adjacent the gate. A second region having the first conductivity type (404) is formed at the face of the substrate beside the gate. A third region having the first conductivity type (430) is formed below the channel and has a greater impurity concentration than the channel.

Abstract: A system for detecting velocity airflow in a duct includes a plurality of vortex shedders arranged within the duct for inducing the shedding of vortices at a corresponding plurality of selected locations at a frequencies related to the airflow in the duct and a sound-sensing location on each vortex shedder. A plurality of microphones, each microphone being coupled acoustically with each sound-sensing location senses sounds generated by said shedding of vortices in a corresponding passage and provides an information signal indicative of said vortex shedding sounds. A processing unit performs a Fast Fourier Transform on the information signals to determine frequency of maximum amplitude within the information signals.

Abstract: A system for detecting velocity airflow in a duct includes a plurality of vortex shedders arranged within the duct for inducing the shedding of vortices at a corresponding plurality of selected locations at a frequencies related to the airflow in the duct and a sound-sensing location on each vortex shedder. A plurality of microphones, each microphone being coupled acoustically with each sound-sensing location senses sounds generated by said shedding of vortices in a corresponding passage and provides an information signal indicative of said vortex shedding sounds. A processing unit performs a Fast Fourier Transform on the information signals to determine frequency of maximum amplitude within the information signals.

Abstract: A system for making financial transfers between subscribers of a financial transfer service is disclosed. The system may include a receiving subscriber interface (RSI), a sending subscriber interface (SSI), and an agent server (AS). The RSI may be configured to accept a set of invoice information including an identifier of a destination account. The SSI may be configured to accept a set of payment information including an identifier of a source account. The AS may be configured to receive the set of invoice information and create an invoice based on the set of invoice information. The AS may also be configured to transmit the invoice and receive the set of payment information. The AS may also be configured to cause an amount of funds to be transferred from the source account on a source transfer network to the destination account on a destination transfer network via a primary transfer network.

Abstract: An electrostatic discharge (ESD) protection circuit is disclosed. The circuit includes a first region having a first conductivity type (410) is formed at a face of a substrate. A gate having a second conductivity type (406) is formed in the substrate beside the first region. A channel having the first conductivity type is formed below the first region adjacent the gate. A second region having the first conductivity type (404) is formed at the face of the substrate beside the gate. A third region having the first conductivity type (430) is formed below the channel and has a greater impurity concentration than the channel.

Abstract: A programmable semiconductor controlled rectifier (SCR) circuit is disclosed. The SCR includes a first terminal (310) and a second terminal (308). A first lightly doped region (304) having a first conductivity type (N?) is formed on a second lightly doped region (314) having a second conductivity type (P?). A first heavily doped region having the second conductivity type (P+) is formed within the first lightly doped region at a face of the substrate and coupled to the first terminal. A second heavily doped region having the first conductivity type (N+) is formed within the second lightly doped region at the face of the substrate and coupled to the second terminal. A third heavily doped region (400) having the second conductivity type (P+) is formed at least partially within the first lightly doped region at the face of the substrate between the first and second heavily doped regions and electrically connected to the second lightly doped region.

Abstract: An electrostatic discharge (ESD) protection circuit is disclosed. The circuit includes a first terminal (200), a first power supply terminal (Vdd), and a second power supply terminal (Vss). The circuit further includes a junction field effect transistor (JFET) having a current path coupled between the first terminal and the second power supply terminal. The JFET has a control terminal (202) coupled to the first power supply terminal.