Patents by Inventor Robert A. Thibault
Robert A. Thibault has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7117275Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.Type: GrantFiled: March 31, 2000Date of Patent: October 3, 2006Assignee: EMC CorporationInventors: Yuval Ofek, David L. Black, Stephen D. Macarthur, Richard Wheeler, Robert Thibault
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Patent number: 7073020Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.Type: GrantFiled: June 29, 2000Date of Patent: July 4, 2006Assignee: EMC CorporationInventors: David L. Black, Stephen D. MacArthur, Richard G. Wheeler, Robert A. Thibault, Michael Shulman
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Patent number: 7007194Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.Type: GrantFiled: June 29, 2000Date of Patent: February 28, 2006Assignee: EMC CorporationInventors: Paul C. Wilson, Mark Zani, Farouk Khan, Christopher S. MacLellan, John K. Walton, Steven MacArthur, Kendall A. Chilton, William Tuccio, Robert A. Thibault
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Patent number: 6993621Abstract: A system interface includes a plurality of first director boards. Each one of the first director boards has a plurality of first directors and a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports. The system interface also includes a plurality of second director boards. Each one of the second directors boards has a plurality of second directors and a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports. A data transfer section is provided having a cache memory. The cache memory is coupled to the plurality of first and second directors. A message network is operative independently of the data transfer section. The message network includes a pair of message network boards. Each one of such message network boards has a switching network having a plurality input/output ports.Type: GrantFiled: March 31, 2000Date of Patent: January 31, 2006Assignee: EMC CorporationInventors: David L. Black, Richard Wheeler, Robert Thibault, Stephen D. MacArthur, Yuval Ofek
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Patent number: 6907483Abstract: A method and system for producing a data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The system interface has a plurality of first directors, a plurality of second directors, and a global memory. The method includes: providing a backplane having slots adapted to have plugged therein a plurality of printed circuit board. The printed circuit boards include: a plurality of first director boards having the first directors; a plurality of second printed circuit boards having the second directors; a plurality of memory printed circuit boards providing the global memory; a plurality of dummy first director boards having first jumpers; a plurality of dummy second director boards having second jumpers; a plurality of dummy memory boards having third jumpers.Type: GrantFiled: March 28, 2002Date of Patent: June 14, 2005Assignee: EMC CorporationInventors: Daniel Castel, Robert A. Thibault, Brian Gallagher
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Patent number: 6877061Abstract: A method and system for producing a data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The system interface has a plurality of first directors, a plurality of second directors, and a global memory. The method includes: providing a backplane having slots adapted to have plugged therein a plurality of printed circuit board. The printed circuit boards include: a plurality of first director boards having the first directors; a plurality of second printed circuit boards having the second directors; a plurality of memory printed circuit boards providing the global memory; a plurality of dummy first director boards having first jumpers; a plurality of dummy second director boards having second jumpers; a plurality of dummy memory boards having third jumpers.Type: GrantFiled: March 28, 2002Date of Patent: April 5, 2005Assignee: EMC CorporationInventors: Robert A. Thibault, Daniel Castel, Brian Gallagher, Paul C. Wilson, John K. Walton, Christopher S. MacLellan
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Patent number: 6868479Abstract: A data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The system interface includes: a plurality of first directors coupled to the host computer/server; a plurality of second directors coupled to the bank of disk drives; a cache memory; and a data transfer section coupled to the plurality of first directors, the second directors, and the cache memory. A messaging network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the host computer and the bank of disk drives in response to messages passing between the directors through the messaging network as such data passes through the memory via the data transfer section. A service processing network is provided for interfacing a plurality of service processing units to the plurality of first and second directors through a plurality of redundant communication channels.Type: GrantFiled: March 28, 2002Date of Patent: March 15, 2005Assignee: EMC CorporationInventors: Robert A. Thibault, Stephen D. MacArthur, Brian Gallagher, Brian Marchionni
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Patent number: 6779071Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.Type: GrantFiled: April 28, 2000Date of Patent: August 17, 2004Assignee: EMC CorporationInventors: Avinash Kallat, Robert Thibault, Stephen D. MacArthur
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Patent number: 6651130Abstract: A system interface includes a plurality of first directors, a plurality of second directors, a data transfer section and a message network. The data transfer section includes a cache memory. The cache memory is coupled to the plurality of first and second directors. The messaging network operates independently of the data transfer section and such network is coupled to the plurality of first directors and the plurality of second directors. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the messaging network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. A method for operating a data storage system adapted to transfer data between a host computer/server and a bank of disk drives.Type: GrantFiled: April 28, 2000Date of Patent: November 18, 2003Assignee: EMC CorporationInventor: Robert Thibault
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Publication number: 20030140192Abstract: A method and system for producing a data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The system interface has a plurality of first directors, a plurality of second directors, and a global memory. The method includes: providing a backplane having slots adapted to have plugged therein a plurality of printed circuit board. The printed circuit boards include: a plurality of first director boards having the first directors; a plurality of second printed circuit boards having the second directors; a plurality of memory printed circuit boards providing the global memory; a plurality of dummy first director boards having first jumpers; a plurality of dummy second director boards having second jumpers; a plurality of dummy memory boards having third jumpers.Type: ApplicationFiled: March 28, 2002Publication date: July 24, 2003Inventors: Robert A. Thibault, Daniel Castel, Brian Gallagher, Paul C. Wilson, John K. Walton, Christopher S. MacLellan
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Patent number: 6584513Abstract: A direct memory access (DMA) transmitter includes: (a) a data register; and (b) a transmitter state machine. Requested data at an address provided by a source is read from the random access memory then transferred for storage in the data register. The central processing unit also sends a control signal to the transmit state machine. The control signal indicates to the transmit state machine whether the read data is a most recent copy of the requested data in random access memory or whether the most recent copy of the requested data is still resident in the local cache memory. In response to the control signal, if the most recent data is in the local cache memory, the transmit state machine inhibits the data that was read from random access memory and now stored in data register from passing to the transmitter output. Transmit state machine then performs a second data transfer request at the same address, the second requested data being transferred from the local cache memory to the random access memory.Type: GrantFiled: March 31, 2000Date of Patent: June 24, 2003Assignee: EMC CorporationInventors: Avinash Kallat, Robert Thibault
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Patent number: 6581112Abstract: A direct memory access (DMA) receiver adapted to receive data from a source, such data to be written into a random access memory is provided. The random access memory and DMA receiver being coupled are to a central processing unit by a bus. The central processing unit is coupled to a local cache memory. The source of such data provides an address for the data, such address being the location the random access memory where the data is to be stored. The DMA receiver includes an address register, a first data register and a duplicate data register. The duplicate register has an input coupled to an output of the first data register. A selector is provided having a pair of inputs, one being coupled to the output of the first data register and another one of the pair of inputs being coupled to an output of the duplicate data register. The selector couples one of the pair of inputs to an output thereof selectively in accordance with a select signal. A state machine is included in the DMA receiver.Type: GrantFiled: March 31, 2000Date of Patent: June 17, 2003Assignee: EMC CorporationInventors: Avinash Kallat, Robert Thibault
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Patent number: 6061274Abstract: A computer storage system includes an array of storage devices, a system cache memory, one or more back end directors for controlling data transfer between the storage devices and the system cache memory, and one or more front end directors for controlling data transfer between the system cache memory and a host computer. Each director includes a processor and a message interface for controlling high speed message transfer between the processors in the directors. The message interfaces in the directors may be interconnected in a closed-loop configuration. Each message interface may include a transmit/receive circuit for transferring messages to and from other directors, a message memory for storing outgoing messages and incoming messages, and a message controller for controlling transfer of messages between the processor and the message memory and between the message memory and the transmit/receive circuit.Type: GrantFiled: January 4, 1999Date of Patent: May 9, 2000Assignee: EMC CorporationInventors: Robert A. Thibault, Michael Shulman
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Patent number: 5277471Abstract: The pick-up truck box supports a topper made of superimposed upper and lower half portions. The topper half portions are interconnected in edgewise fashion by a connector assembly. This connector assembly is also used as an anchor point for cupboards supported within the enclosure of the topper. The topper side walls are releasably anchored to the truck box side walls by a pivotal handle bar assembly. The latter includes a removable pivotable handle, projecting inside the topper enclosure, and a fulcrum end with an elastomeric pad to frictionally anchor the topper to the truck box. Release of the handle bar lock is possible only from within the topper enclosure.Type: GrantFiled: November 24, 1992Date of Patent: January 11, 1994Inventor: Robert Thibault
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Patent number: 4114256Abstract: A self-aligned technique for making metal-to-junction contacts in a shallow-junction large-scale-integrated device involves opening very small contact windows in the intermediate insulating layer of the device. These windows respectively overlie only limited central regions of the junctions. Impurities are then applied via the contact windows to provide deeper junction portions directly below the windows. As a result, metallic contact regions subsequently deposited in the windows are exactly aligned with respect to the deeper junction portions. Penetration or spiking of the junctions by the metallic regions is thereby significantly reduced.Type: GrantFiled: June 24, 1977Date of Patent: September 19, 1978Assignee: Bell Telephone Laboratories, IncorporatedInventors: Louis Robert Thibault, Leopoldo Dy Yau