Patents by Inventor Robert Aitken

Robert Aitken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240091800
    Abstract: A hand held spray dispenser in which air and liquid are pressurised towards a mixing chamber by energy generated by a manual activation element that is rotated with a unidirectional twist to energise one or more energy storage bodies, energy from which is released to generate sufficient air pressure and air flow and sufficient liquid flow for a spray to be formed from the air-liquid mixture.
    Type: Application
    Filed: December 7, 2021
    Publication date: March 21, 2024
    Inventors: Andrew Robert AITKEN, Sebastian ALVAREZ, Sjoerd Paul HOIJINCK, Eduardo CARVALHAL LAGE VON BUETTNER RISTOW, Guy Richard THOMPSON
  • Publication number: 20240001382
    Abstract: A hand held spray dispenser in which air and liquid are pressurised towards a turbulence chamber and wherein air is introduced into the liquid adjacent to an inlet orifice of the turbulence chamber and the mixture passes through the inlet orifice into the turbulence chamber before being expelled through an exit orifice.
    Type: Application
    Filed: December 7, 2021
    Publication date: January 4, 2024
    Inventors: Andrew Robert AITKEN, Sebastian ALVAREZ, Sjoerd Paul HOIJINCK, Eduardo CARVALHAL LAGE VON BUETTNER RISTOW, Guy Richard THOMPSON
  • Patent number: 10354727
    Abstract: A monitoring circuit for a CES element is provided. The circuit includes a control circuit and an output circuit. The control circuit is configured to vary a control signal provided to the CES element. The control signal may be varied for determining an impedance state of the CES element. The output circuit provided an output signal in dependence on the determined impedance state of the CES element.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: July 16, 2019
    Assignee: ARM Ltd.
    Inventors: Bal S. Sandhu, Robert Aitken, George Lattimore
  • Publication number: 20180342295
    Abstract: A monitoring circuit for a CES element is provided. The circuit includes a control circuit and an output circuit. The control circuit is configured to vary a control signal provided to the CES element. The control signal may be varied for determining an impedance state of the CES element. The output circuit provided an output signal in dependence on the determined impedance state of the CES element.
    Type: Application
    Filed: April 23, 2018
    Publication date: November 29, 2018
    Inventors: Bal S. Sandhu, Robert Aitken, George Lattimore
  • Patent number: 9979385
    Abstract: A monitoring circuit for a CES element is provided. The circuit includes a control circuit and an output circuit. The control circuit is configured to vary a control signal provided to the CES element. The control signal may be varied for determining an impedance state of the CES element. The output circuit provided an output signal in dependence on the determined impedance state of the CES element.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: May 22, 2018
    Assignee: ARM Ltd.
    Inventors: Bal S. Sandhu, Robert Aitken, George Lattimore
  • Publication number: 20170099049
    Abstract: A monitoring circuit for a CES element is provided. The circuit includes a control circuit and an output circuit. The control circuit is configured to vary a control signal provided to the CES element. The control signal may be varied for determining an impedance state of the CES element. The output circuit provided an output signal in dependence on the determined impedance state of the CES element.
    Type: Application
    Filed: October 5, 2015
    Publication date: April 6, 2017
    Inventors: Bal S. Sandhu, Robert Aitken, George Lattimore
  • Publication number: 20070106923
    Abstract: An integrated circuit and method for testing memory on the integrated circuit are provided. The integrated circuit has processing logic for performing data processing operations on data, and a plurality of memory units for storing data for access by the processing logic. Further, memory test logic is provided to perform a sequence of tests in order to seek to detect memory defects in the memory units. The memory test logic comprises a plurality of test wrapper units, each test wrapper unit associated with one of the memory units and being operable to execute tests on the associated memory unit, and a test controller for controlling performance of the sequence of tests by communicating with each of the test wrapper units to provide test data defining each test to be executed by that test wrapper unit.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 10, 2007
    Inventors: Robert Aitken, Gary Waggoner
  • Publication number: 20050237823
    Abstract: In an environment wherein a microprocessor can operate at several different voltage levels depending upon the instantaneous throughput of the microprocessor, a memory and memory adjustment circuit that permits operating the memory at a plurality of voltages in response to the microprocessor is disclosed. The memory and memory adjustment circuit sense the instantaneous operating voltage of the microprocessor and adjust the operating voltage of the memory in response thereto. The memory adjustment circuit more particularly increases or decreases the memory's bitline sense interval in response respectively to a decrease or increase in the memory's operating voltage.
    Type: Application
    Filed: April 27, 2004
    Publication date: October 27, 2005
    Applicant: Artisan Components, Inc.
    Inventors: Robert Aitken, Dhrumil Gandhi