Abstract: A method and apparatus for storing a disk drive media defect table or list. Defect table entries for a subject disk track are stored on the subject track and retrieved for determining defective sectors only when the subject track is accessed for a data read or write operation.

Abstract: An invention is provided for improving performance in block based non-volatile memory when performing random small write operations. When requests for small page updates are received for a memory page currently storing data, the updated page data is written to a reserve memory page. The reserve memory page can be in the same memory block as the target memory page, or in an associated reserve memory block. In addition, the associated logical page address is temporarily remapped to the reserve page. Later, when time permits, the page data for the block can be reorganized into continuous pages in a new block.

Abstract: An invention is provided for ensuring data integrity in a non-volatile memory system, including boot block data integrity during Power On Reset. The invention includes loading data into a buffer, such as a flash buffer, and generating an error detection code for the data utilizing a check code generator located in the memory controller. The error detection code is compared to a previously stored error detection code associated with the data. Then, when the error detection code is different from the previously stored error detection code, a correction pattern is calculated and applied to the data directly in the buffer for the non-volatile memory.

Abstract: An invention is provided for performing flush cache in a non-volatile memory. The invention includes maintaining a plurality of free memory blocks within a non-volatile memory. When a flush cache command is issued, a flush cache map is examined to obtain a memory address of a memory block in the plurality of free memory blocks within the non-volatile memory. The flush cache map includes a plurality of entries, each entry indicating a memory block of the plurality of free memory blocks. Then, a cache block is written to a memory block at the obtained memory address within the non-volatile memory. In this manner, when a flush cache command is received, the flush cache map allows cache blocks to be written to free memory blocks in the non-volatile memory without requiring a non-volatile memory search for free blocks or requiring erasing of memory blocks storing old data.

Abstract: An invention is provided for affording CopyBack data integrity in a non-volatile memory system. When the potential for moving data with a CopyBack command occurs, a counter corresponding to the data is examined. When the counter is below a predetermined limit, the counter is incremented and data from the block of data is moved using a CopyBack command. However, when the counter reaches the predetermined limit, the counter is reset and data from the block of data is moved to system memory and examined for errors. Once any errors are corrected, the data is transferred back to the non-volatile memory.

Abstract: An invention is provided for memory management in a non-volatile memory which includes a plurality of memory blocks. The invention includes loading a block table from a memory block of the non-volatile memory into system memory, where the block table includes, inter alia, a plurality of entries mapping a physical block address of the non-volatile memory to a logical block address of the non-volatile memory. The block table is updated as data is accessed in the non-volatile memory, and the updated block table is stored into a memory block of the non-volatile memory. Generally, the block table is stored periodically and/or at system shutdown.

Abstract: An invention is provided for read disturbance management in a non-volatile memory. The invention includes storing a read count data for a memory location in non-volatile memory. The read count data indicating an amount of read operations accessing the memory location since data was last written to the memory location. Then, when data is read from the memory location while the value of the read count data is less than a predetermined threshold value, the value of the read count data is incremented. However, when the value of the read count data equals the predetermined threshold value, the data is moved to a new memory location, thereby avoiding read disturbance effects.

Abstract: An invention is provided for managing non-volatile memory having a plurality of memory blocks and a plurality of error values associated with the memory blocks. The method includes recording an error value indicating a number of errors occurring in a memory block during an operation accessing the memory block. The error values can then be aggregated to calculate an overall health of the memory, or used individually, for example, by selecting a memory block for a memory operation based on the associated error value. In general, the error value is updated when the most recent number of errors occurring in the memory block during an operation accessing the memory block is greater than a current recorded value.

Abstract: An invention is provided for wear leveling in a non-volatile memory system utilizing relative wear counters to indicate relative levels of wear for each memory block in a non-volatile memory system. Whenever a memory block is erased, the associated relative wear counter is incremented. Then, when any relative wear counter reaches a predetermined limit, the value of the lowest relative wear counter is subtracted from each relative wear counter. Thus, each relative wear counter indicates a relative wear level of the associated memory block relative to other memory blocks. In this manner, the relative wear levels are maintained while reducing the amount of memory needed to for each relative wear counter.

Abstract: An invention is provided for improving performance in block based non-volatile memory when performing random small write operations. When requests for small page updates are received for a memory page currently storing data, the updated page data is written to a reserve memory page. The reserve memory page can be in the same memory block as the target memory page, or in an associated reserve memory block. In addition, the associated logical page address is temporarily remapped to the reserve page. Later, when time permits, the page data for the block can be reorganized into continuous pages in a new block.

Abstract: An invention is provided for managing non-volatile memory having a plurality of memory blocks and a plurality of error values associated with the memory blocks. The method includes recording an error value indicating a number of errors occurring in a memory block during an operation accessing the memory block. The error values can then be aggregated to calculate an overall health of the memory, or used individually, for example, by selecting a memory block for a memory operation based on the associated error value. In general, the error value is updated when the most recent number of errors occurring in the memory block during an operation accessing the memory block is greater than a current recorded value.

Abstract: An invention is provided for performing flush cache in a non-volatile memory. The invention includes maintaining a plurality of free memory blocks within a non-volatile memory. When a flush cache command is issued, a flush cache map is examined to obtain a memory address of a memory block in the plurality of free memory blocks within the non-volatile memory. The flush cache map includes a plurality of entries, each entry indicating a memory block of the plurality of free memory blocks. Then, a cache block is written to a memory block at the obtained memory address within the non-volatile memory. In this manner, when a flush cache command is received, the flush cache map allows cache blocks to be written to free memory blocks in the non-volatile memory without requiring a non-volatile memory search for free blocks or requiring erasing of memory blocks storing old data.

Abstract: An invention is provided for read disturbance management in a non-volatile memory. The invention includes storing a read count data for a memory location in non-volatile memory. The read count data indicating an amount of read operations accessing the memory location since data was last written to the memory location. Then, when data is read from the memory location while the value of the read count data is less than a predetermined threshold value, the value of the read count data is incremented. However, when the value of the read count data equals the predetermined threshold value, the data is moved to a new memory location, thereby avoiding read disturbance effects.

Abstract: An invention is provided for memory management in a non-volatile memory which includes a plurality of memory blocks. The invention includes loading a block table from a memory block of the non-volatile memory into system memory, where the block table includes, inter alia, a plurality of entries mapping a physical block address of the non-volatile memory to a logical block address of the non-volatile memory. The block table is updated as data is accessed in the non-volatile memory, and the updated block table is stored into a memory block of the non-volatile memory. Generally, the block table is stored periodically and/or at system shutdown.

Abstract: An invention is provided for affording CopyBack data integrity in a non-volatile memory system. When the potential for moving data with a CopyBack command occurs, a counter corresponding to the data is examined. When the counter is below a predetermined limit, the counter is incremented and data from the block of data is moved using a CopyBack command. However, when the counter reaches the predetermined limit, the counter is reset and data from the block of data is moved to system memory and examined for errors. Once any errors are corrected, the data is transferred back to the non-volatile memory.

Abstract: An invention is provided for wear leveling in a non-volatile memory system utilizing relative wear counters to indicate relative levels of wear for each memory block in a non-volatile memory system. Whenever a memory block is erased, the associated relative wear counter is incremented. Then, when any relative wear counter reaches a predetermined limit, the value of the lowest relative wear counter is subtracted from each relative wear counter. Thus, each relative wear counter indicates a relative wear level of the associated memory block relative to other memory blocks. In this manner, the relative wear levels are maintained while reducing the amount of memory needed to for each relative wear counter.

Abstract: An invention is provided for ensuring data integrity in a non-volatile memory system, including boot block data integrity during Power On Reset. The invention includes loading data into a buffer, such as a flash buffer, and generating an error detection code for the data utilizing a check code generator located in the memory controller. The error detection code is compared to a previously stored error detection code associated with the data. Then, when the error detection code is different from the previously stored error detection code, a correction pattern is calculated and applied to the data directly in the buffer for the non-volatile memory.

Abstract: A task switch from a first data processing task to a second data processing task can be accomplished by the first task calling a function which saves the first task's context, restores the second task's context and then returns. Because the second task's context has been restored, the called function actually returns to the second task, thereby completing the task switch.

Abstract: A task switch from a first data processing task to a second data processing task can be accomplished by the first task calling a function which saves the first task's context, restores the second task's context and then returns. Because the second task's context has been restored, the called function actually returns to the second task, thereby completing the task switch.

Abstract: A human brain glycoprotein homologous to the mouse F3 and the chicken contactin/F11 adhesion molecules, nucleic acid sequences encoding the human brain glycoprotein and antibodies directed against the human brain glycoprotein.