Patents by Inventor Robert Anthony William

Robert Anthony William has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200399350
    Abstract: The invention relates to antibodies and antigen-binding fragments that specifically bind to microtubule-associated protein tau. The invention also relates to diagnostic, prophylactic and therapeutic methods using anti-tau antibodies.
    Type: Application
    Filed: July 17, 2019
    Publication date: December 24, 2020
    Inventors: Jehangir WADIA, Gabriel PASCUAL, Robert Anthony WILLIAMS, Katarina RADOSEVIC, Jaap GOUDSMIT
  • Patent number: 6055579
    Abstract: A system for synchronization of data processing in a data processing system including multiple command queues is disclosed. The disclosed data processing system includes one or more processing engines associated with one or more command queues. The use of multiple command queues supports multiple priority levels, such that commands in higher priority queues may preempt commands in lower priority queues. Data processing is synchronized by queue commands that allow a processing engine to queue commands on the command queue of any processing engine in the data processing system, including its own. Multiple data dependencies are resolved by conditional queue commands and event counters that queue a command only when all of the conditions precedent to execution of a particular data processing command are satisfied. The hardware queuing of the disclosed invention advantageously synchronizes data processing with minimal software supervision and with minimal latency.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: April 25, 2000
    Assignee: Silicon Graphics, Inc.
    Inventors: Girish Kumar Goyal, Robert Anthony William, Michael Ken Minakami, David Allen Lockett, Tarik Isani, Mark Paul von Gnechten
  • Patent number: 5764965
    Abstract: A synchronization backbone for use in a computer system having a system board containing at least one central processing unit for processing digital data, a memory coupled to the system board for storing the digital data, a plurality of subsystems, and a bus structure for transmitting electrical signals between the system board, the memory, and the plurality of subsystems. The synchronization backbone provides the infrastructure that enables professional quality synchronization between the various subsystems. A clock generator is used to generate a system clock that is transmitted to each of the subsystems. The sample rate of a designated subsystem is used as a digital synchronization signal. The selected digital synchronization signal is then transmitted to each of the other subsystems. A synchronization circuit adjusts the sample rates associated with the other subsystems according to the digital synchronization signal and the system clock.
    Type: Grant
    Filed: September 23, 1996
    Date of Patent: June 9, 1998
    Assignee: Silicon Graphics, Inc.
    Inventors: Michael K. Poimboeuf, Jeffrey W. Milo, Robert Anthony Williams, Ross G. Werner