Abstract: A package and method for packaging a semiconductor device formed in a surface portion of a semiconductor wafer. The package includes: a dielectric layer disposed on the surface portion of the semiconductor wafer having a device exposing opening to expose one of the devices and an electrical contacts pad opening to expose an electrical contact pad; and a porous material in the device exposing opening over said one of the devices.

Abstract: A MMIC flip chip mounted to a circuit board having an underfill material disposed between the MMIC and the circuit board and a barrier structure for preventing the underfill material from being disposed under an electronic device of the MMIC while providing a cavity under the electronic device.

Abstract: A MMIC flip chip mounted to a circuit board having an underfill material disposed between the MMIC and the circuit board and a barrier structure for preventing the underfill material from being disposed under an electronic device of the MMIC while providing a cavity under the electronic device.

Abstract: A package and method for packaging a semiconductor device formed in a surface portion of a semiconductor wafer. The package includes: a dielectric layer disposed on the surface portion of the semiconductor wafer having a device exposing opening to expose one of the devices and an electrical contacts pad opening to expose an electrical contact pad; and a porous material in the device exposing opening over said one of the devices.

Abstract: A semiconductor structure having: a wafer; and a plurality of chips disposed on the wafer, each one of the chips having a linear array of a plurality of transistors, the linear array being at an oblique angle with respect to grid lines in the wafer separating the chips. Each one of the transistors has a plurality of parallel control electrodes extending longitudinally along an axis perpendicular to the axis along which the plurality of transistors is distributed. A matching circuit is disposed on the integrated circuit chip between a corner of the integrated circuit chip and the plurality of transistors.

Abstract: A semiconductor chip comprises: a semiconductor structure having a single crystal substrate having a non-cubic crystallographic structure and epitaxial layers disposed on the substrate wherein adjacent sides of the semiconductor structure are at oblique angles. A method for separating a plurality of integrated circuit chips. The method includes: providing a semiconductor wafer having single crystal substrate, such substrate having a non-cubic crystallographic structure with an epitaxial layer disposed on the substrate; forming scribe lines at oblique angles to one another in the epitaxial layer; and cutting or cleaving through the substrate along the scribe lines to separate the chips.

Abstract: According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2.

Abstract: According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2.

Abstract: According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2.

Abstract: A semiconductor structure and method wherein a recess is disposed in a surface portion of a semiconductor structure and a dielectric film is disposed on and in contract with the semiconductor. The dielectric film has an aperture therein. Portions of the dielectric film are disposed adjacent to the aperture and overhang underlying portions of the recess. An electric contact has first portions thereof disposed on said adjacent portions of the dielectric film, second portions disposed on said underlying portions of the recess, with portions of the dielectric film being disposed between said first portion of the electric contact and the second portions of the electric contact, and third portions of the electric contact being disposed on and in contact with a bottom portion of the recess in the semiconductor structure. The electric contact is formed by atomic layer deposition of an electrically conductive material over the dielectric film and through the aperture in such dielectric film.

Abstract: A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming in a material disposed on the surface portion of the semiconductor wafer device-exposing openings to exposed the devices and electrical contacts pads openings to expose electrical contact pads for devices; mounting a rigid dielectric layer over the formed material, such rigid material being suspended over the device exposing openings in the material and over the electrical contacts pads openings in the material; and forming electrical contact pad openings in portions of the rigid dielectric layer disposed over electrical contact pads of the devices with other portions of the rigid dielectric layer remaining suspended over the device exposing openings in the material.

Abstract: According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2.

Abstract: A semiconductor structure and method wherein a recess is disposed in a surface portion of a semiconductor structure and a dielectric film is disposed on and in contract with the semiconductor. The dielectric film has an aperture therein. Portions of the dielectric film are disposed adjacent to the aperture and overhang underlying portions of the recess. An electric contact has first portions thereof disposed on said adjacent portions of the dielectric film, second portions disposed on said underlying portions of the recess, with portions of the dielectric film being disposed between said first portion of the electric contact and the second portions of the electric contact, and third portions of the electric contact being disposed on and in contact with a bottom portion of the recess in the semiconductor structure. The electric contact is formed by atomic layer deposition of an electrically conductive material over the dielectric film and through the aperture in such dielectric film.

Abstract: A microwave window structure for a low-pressure chamber is provided. The window structure enables microwave energy to be introduced into the chamber from a source external to the chamber. The window structure includes a fixture having electrically conductive walls. Inner portions of the walls provide a peripheral region of an aperture within such fixture. The fixture is adapted for mounting to a sidewall portion of the chamber. A solid, microwave energy transparent dielectric window is included. The window includes: a periphery portion affixed to the fixture; and, an inner region disposed within the aperture of the fixture.

Abstract: A microwave window structure for a low-pressure chamber is provided. The window structure enables microwave energy to be introduced into the chamber from a source external to the chamber. The window structure includes a fixture having electrically conductive walls. Inner portions of the walls provide a peripheral region of an aperture within such fixture. The fixture is adapted for mounting to a sidewall portion of the chamber. A solid, microwave energy transparent dielectric window is included. The window includes: a periphery portion affixed to the fixture; and, an inner region disposed within the aperture of the fixture. A first surface of the inner region is disposed in the chamber and a second, opposite surface of the inner region widow being disposed external to the chamber. The window has a sidewall portion with a first end thereof terminating in the first surface and a second end thereof terminating at the periphery portion. The sidewall portion of the window is spaced from the walls of the fixture.

Abstract: Methods for forming or purifying organometallic compounds of elements of Group III-A of the Periodic Table. An intermediate compound is formed which is an adduct of the desired organometallic compound and a Group I-A or Group II-A compound. The adduct is nonvolatile, so volatile impurities are removed from the adduct by distillation. The adduct is decomposed to release the volatile organometallic compound, which is then distilled away from the nonvolatile remainder of the adduct. The method can be used to produce organometallic compounds which are substantially free of volatile metallic compounds and complexed solvents. A method of separating volatile Group II-B impurities from volatile Group III-A compounds is also disclosed.

Abstract: According to one embodiment of the disclosure, a method for passivating a circuit device generally includes providing a substrate having a substrate surface, forming an electrical component on the substrate surface, and coating the substrate surface and the electrical component with a first protective dielectric layer. The first protective dielectric layer is made of a generally moisture insoluble material having a moisture permeability less than 0.01 gram/meter2/day, a moisture absorption less than 0.04 percent, a dielectric constant less than 10, a dielectric loss less than 0.005, a breakdown voltage strength greater than 8 million volts/centimeter, a sheet resistivity greater than 1015 ohm-centimeter, and a defect density less than 0.5/centimeter2.