Abstract: Structure fabricating using standard integrated injection logic (I.sup.2 L) process techniques for providing a multiple of controlled current source outputs for driving I.sup.2 L to analog interfaces. The current source structure is formed in minimum die area because of the space saving features of I.sup.2 L and tracks the performance of the I.sup.2 L circuit. The current source includes a common P-type emitter region diffused into an isolated N-type epitaxial layer which has been isolated by a deep N+-type diffusion region. Multiple collector P-type regions which are isolated from each other by the N+-type isolating region are diffused into the isolated portion of the epitaxial layer in spaced relationship to the common emitter region. An ion implanted resistor couples the common emitter region to a source of operating potential such that current is injected from the emitter region via the lateral PNP formed transistors to produce multiple output currents from the collector regions.

Abstract: A circuit responsive to a supplied control input signal for alternately sourcing and sinking current at an output the values of which are accurately matched comprising a single current reference source and a single NPN current mirror circuit. The current reference source is unilaterally coupled to the output when the circuit is in a first mode of operation to provide the source current and is coupled to the NPN current mirror circuit which is rendered conductive in a second mode of operation to provide the input current to said current mirror. The output of the current mirror being coupled to the output sinks current thereat which is substantially equal to the input current supplied thereto. The NPN current mirrors comprises a pair of matched transistors having the bases and emitters interconnected at first and second nodes respectively.

Abstract: An integrated circuit current-output relaxation oscillator utilizes an internal or external capacitor which is alternately charged from +V.sub.BE to a predetermined upper trip point and then discharged to +V.sub.BE. A control current proportional to the voltage across the capacitor is generated and compared with a reference current. When the control current achieves a predetermined value with respect to the reference current, a transistor is turned on permitting the capacitor to discharge to +V.sub.BE. The control current is generated by the same current mirror circuit which generates the oscillating output current and is either equal or proportional thereto. Therefore, the magnitude of the oscillating output current is dominantly proportional to the magnitude of the reference current, and the frequency of oscillation is dominantly dependent on passive components; i.e. a resistor and a capacitor.

Abstract: A differential to single-ended converter circuit is disclosed which utilizes integrated injection logic device geometrics to significantly reduce the area required to fabricate the converter within an integrated circuit. Inverted transistor operation and multiple collector output terminals allow the converter circuit to directly drive integrated injection logic circuitry which may be fabricated within the same integrated circuit chip. When used in conjunction with a voltage comparator circuit, the differential to single-ended converter circuit maintains the offset associated with the comparator circuit at a minimum despite variations in operating temperature and variations in integrated circuit processing.

Abstract: A three terminal current source is disclosed including a current turn around circuit comprising first and second transistors. The emitters of the pair of transistors are coupled to a common terminal with the collector of the first one of the pair of the transistors being coupled to an input terminal at which is supplied a reference current with the collector of the other one of the pair of transistors being coupled in cascode through the emitter collector path of an output transistor to the output terminal of the current source circuit. The base electrodes of the pair of transistors are directly connected to each other with the control electrode of the output transistor being connected to the collector of the first one of the pair of transistors of the current turn around circuit.

Abstract: An interface circuit is disclosed for receiving a ground-referenced A.C. signal for detecting transitions of the A.C. signal about ground potential. An input transistor is enabled when the A.C. signal voltage falls below ground potential by one base-emitter forward drop. The input transistor is disabled when the A.C. signal voltage rises above ground potential by one base-emitter forward drop. A feedback circuit and a bias circuit are coupled to the input transistor for switching the threshold levels of the input transistor. The interface circuit employs a hysteresis-type switching action for improving noise immunity while providing a symmetric output waveform. The circuit requires only a single power supply and is suitable for fabrication as a highly dense, monolithic integrated circuit. Also, the circuit provides a low input impedance to large positive and negative voltage transients.

Abstract: A variable dwell ignition system comprising a circuit responsive to changes in engine RPM for causing the dwell time of the ignition system to be varied accordingly. The circuit is adapted to be connected to a sensor coil to receive ignition timing signals developed thereacross which are generated in timed relationship to the engine operation. The circuit provides for changing the direct current (DC) level about which the ignition signals are generated such that a threshold level is varied. As the threshold level is varied the dwell time of the system is varied respectively.