Patents by Inventor Robert B. Laibowitz
Robert B. Laibowitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6888714Abstract: A voltage supply bypass capacitor for use with a semiconductor integrated circuit chip or module comprising a ferroelectric dielectric having electromechanical properties designed to provide maximum losses at selected frequencies.Type: GrantFiled: November 27, 2002Date of Patent: May 3, 2005Assignee: International Business Machines CorporationInventors: Thomas M. Shaw, W. David Pricer, Deborah A. Neumayer, John D. Baniecki, Robert B. Laibowitz
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Patent number: 6815343Abstract: A method of substantially reducing and/or eliminating the amount of defects and/or impurities that amass at interfacial surfaces that are present in a multilayer structure is provided. Specifically, the method improves the efficiency of a forming gas anneal by providing a multilayer structure having a catalytic layer formed thereon or buried therein which allows for a significant increase in the amount of hydrogen or deuterium which can be incorporated into the structure. The method is also conducted at a low temperature (on the order of about 400° C. or less). Multilayer structures are also provided which include an annealed multilayer structure having at least one interfacial surface present therein. The at least one material interface contains a region of hydrogen or deuterium which substantially reduces defects and impurities present at the at least one interface.Type: GrantFiled: December 30, 2002Date of Patent: November 9, 2004Assignee: International Business Machines CorporationInventors: John D. Baniecki, Robert B. Laibowitz, Christopher C. Parks, Thomas M. Shaw
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Publication number: 20040126939Abstract: A method of substantially reducing and/or eliminating the amount of defects and/or impurities that amass at interfacial surfaces that are present in a multilayer structure is provided. Specifically, the method improves the efficiency of a forming gas anneal by providing a multilayer structure having a catalytic layer formed thereon or buried therein which allows for a significant increase in the amount of hydrogen or deuterium which can be incorporated into the structure. The method is also conducted at a low temperature (on the order of about 400° C. or less). Multilayer structures are also provided which include an annealed multilayer structure having at least one interfacial surface present therein. The at least one material interface contains a region of hydrogen or deuterium which substantially reduces defects and impurities present at the at least one interface.Type: ApplicationFiled: December 30, 2002Publication date: July 1, 2004Inventors: John D. Baniecki, Robert B. Laibowitz, Christopher C. Parks, Thomas M. Shaw
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Publication number: 20030112578Abstract: A voltage supply bypass capacitor for use with a semiconductor integrated circuit chip or module comprising a ferroelectric dielectric having electromechanical properties designed to provide maximum losses at selected frequencies.Type: ApplicationFiled: November 27, 2002Publication date: June 19, 2003Applicant: International Business Machines CorporationInventors: Thomas M. Shaw, W. David Pricer, Deborah A. Neumayer, John D. Baniecki, Robert B. Laibowitz
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Patent number: 6507476Abstract: A method for configuring a bypass capacitor for use in conjunction with an integrated circuit device is disclosed. In an exemplary embodiment of the invention, the method includes selecting mechanical dimensions for the bypass capacitor, the mechanical dimensions causing the bypass capacitor to exhibit electrical losses at a clock frequency of the integrated circuit device. The bypass capacitor preferably includes a ferroelectric dielectric material. In addition, the selection of mechanical dimensions for the bypass capacitor determines a mechanical resonance frequency for the bypass capacitor, with the mechanical resonance frequency corresponding to the clock frequency.Type: GrantFiled: November 1, 1999Date of Patent: January 14, 2003Assignee: International Business Machines CorporationInventors: Thomas M. Shaw, W. David Pricer, Deborah A. Neumayer, John D. Baniecki, Robert B. Laibowitz
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Patent number: 6344660Abstract: A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. The structure comprises a suitable substrate disposed with he following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages.Type: GrantFiled: June 2, 1999Date of Patent: February 5, 2002Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Peter Richard Duncombe, Bruce K. Furman, Robert B. Laibowitz, Deborah Ann Neumayer, Sampath Purushothaman
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Publication number: 20010016226Abstract: This invention relates to a method for improving the chemical and electrical performance characteristics of a dielectric material especially one with high dielectric constant. The method comprises the steps of first obtaining a high dielectric constant material, the material having a degraded upper surface reduced dielectric constant and then modifying the surface chemistry of said upper surface by reacting said upper surface with a reactant. The reaction enables removal of the degraded layer. In a variant of the method, the gas reactant preferentially reacting with upper surface as compared to the bulk.Type: ApplicationFiled: April 2, 2001Publication date: August 23, 2001Applicant: International Business Machines CorporationInventors: Wesley Natzle, Peter R. Duncombe, Rajarao Jammy, David E. Kotecki, Robert B. Laibowitz, Chienfan Yu
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Patent number: 6054328Abstract: This invention relates to a method for improving the chemical and electrical performance characteristics of a high dielectric constant material. The method comprises the steps of first obtaining a barium containing high dielectric constant material, the material having an upper surface and then modifying the surface chemistry of said upper surface by interacting said upper surface with a gas reactant in a closed environment. In a variant of the method, the gas reactant preferentially reacting with upper surface as compared to the bulk.Type: GrantFiled: December 6, 1996Date of Patent: April 25, 2000Assignee: International Business Machines CorporationInventors: Peter R. Duncombe, David E. Kotecki, Robert B. Laibowitz, Wesley Natzle, Chienfan Yu
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Patent number: 5981970Abstract: A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. The structure comprises a suitable substrate disposed with he following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure.Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages.Type: GrantFiled: March 25, 1997Date of Patent: November 9, 1999Assignee: International Business Machines CorporationInventors: Christos Dimitrios Dimitrakopoulos, Peter Richard Duncombe, Bruce K. Furman, Robert B. Laibowitz, Deborah Ann Neumayer, Sampath Purushothaman
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Patent number: 5946551Abstract: A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. A fabrication process for the same, especially a process for deposition of the gate insulator using chemical solutions. The structure comprises a suitable substrate disposed with the following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages.Type: GrantFiled: March 25, 1997Date of Patent: August 31, 1999Inventors: Christos Dimitrios Dimitrakopoulos, Peter Richard Duncombe, Bruce K. Furman, Robert B. Laibowitz, Deborah Ann Neumayer, Sampath Purushothaman
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Patent number: 5447906Abstract: Superconducting transition metal oxide films are provided which exhibit very high onsets of superconductivity and superconductivity at temperatures in excess of 40.degree. K. These films are produced by vapor deposition processes using pure metal sources for the metals in the superconducting compositions, where the metals include multi-valent nonmagnetic transition metals, rare earth elements and/or rare earth-like elements and alkaline earth elements. The substrate is exposed to oxygen during vapor deposition, and, after formation of the film, there is at least one annealing step in an oxygen ambient and slow cooling over several hours to room temperature. The substrates chosen are not critical as long as they are not adversely reactive with the superconducting oxide film. Transition metals include Cu, Ni, Ti and V, while the rare earth-like elements include Y, Sc and La. The alkaline earth elements include Ca, Ba and Sr.Type: GrantFiled: June 23, 1994Date of Patent: September 5, 1995Assignee: International Business Machines CorporationInventors: Praveen Chaudhari, Richard J. Gambino, Roger H. Koch, James A. Lacey, Robert B. Laibowitz, Joseph M. Viggiano
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Patent number: 5298875Abstract: Apparatus for levitating a magnetic body. The apparatus includes a structure (10) comprised of a material that is superconductive below a critical temperature. The structure includes at least one Josephson junction device (14) for passing a variable current therethrough for controlling an amount of magnetic flux penetration into the structure. At a first current flow magnetic flux generated by a magnetic body (12) is excluded from the structure and the magnetic body is levitated above a surface of the structure. At a second current flow the magnetic flux penetrates the structure, causing he levitating magnetic body to approach a surface of the structure. Controllably applying a current to an array (30) of superconductive tiles (34), forming Josephson tunnel junctions (38), is shown to provide a lateral motion of, or a rotation of, the magnetic body relative to the surface.Type: GrantFiled: May 22, 1991Date of Patent: March 29, 1994Assignee: International Business Machines CorporationInventors: Robert B. Laibowitz, Gordon J. Lasher
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Patent number: 5026682Abstract: A superconducting device operable at temperatures in excess of 30.degree. K. and a method for making the device are described. A representative device is an essentially coplanar SQUID device formed in a single layer of high T.sub.c superconducting material, the SQUID device being operable at temperatures in excess of 60.degree. K. High energy beams, for example ion beams, are used to convert selected portions of the high T.sub.c superconductor to nonsuperconductor properties so that the material now has both superconductive regions and nonsuperconductive regions. In this manner a superconducting loop having superconducting weak links can be formed to comprise the SQUID device.Type: GrantFiled: April 13, 1987Date of Patent: June 25, 1991Assignee: International Business Machines CorporationInventors: Gregory J. Clark, Richard J. Gambino, Roger H. Koch, Robert B. Laibowitz, Allan D. Marwick, Corwin P. Umbach
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Patent number: 4982248Abstract: A new solid state device based on mesoscopic phenomena is described. A structure of the mesoscopic device includes phase altering scattering sites at various energy levels disposed in proximity to a conductive channel. The carries in the channel, being isolated by a potential barrier, are not in substantial scattering interaction with the phase altering scattering sites in the absence of a sufficiently large voltage at the gate of the mesoscopic device. Increasing the potential at the gate, imposes a localized electric field along the channel, increases the energy levels of the carriers in the channel, and allows the carriers to interact with the phase altering scattering sites, thereby controllably varying the conductance of the channel.Type: GrantFiled: January 11, 1989Date of Patent: January 1, 1991Assignee: International Business Machines CorporationInventors: Robert B. Laibowitz, Corwin P. Umbach
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Patent number: 4962086Abstract: High T.sub.c oxide superconductive films can be formed on gallate layers, where the gallate layers include a rare earth element or a rare earth-like element. Combinations of rare earth elements and rare earth-like elements can also be utilized. The superconductive films can be epitaxially deposited on these gallate layers to form single crystals or, in the minimum, highly oriented superconductive layers. Any high T.sub.c superconductive oxide material can be utilized, but the best lattice matches are to superconductive materials including copper oxides. Examples include Y-Ba-Cu-O systems, Bi-based systems and Tl-based systems.Type: GrantFiled: June 8, 1988Date of Patent: October 9, 1990Assignee: International Business Machines CorporationInventors: William J. Gallagher, Edward A. Giess, Aranava Gupta, Robert B. Laibowitz, Eugene J. O'Sullivan, Robert L. Sandstrom
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Patent number: 4751563Abstract: This invention relates to an interconnection device which includes microminiaturized conductive interconnections between a pair of conductive layers and to a method for fabricating such devices. The conductive interconnections are made from normal metal, superconductors, low bandgap insulators, semimetals or semiconductors depending on the application, and form vias between the two layers of normal metallic, superconducting, low bandgap insulating, semimetallic or semiconducting materials, or any combination of these materials. The structure and method of the present invention revolve about contamination resist cone structures which are formed by irradiating a carbonaceous film such as silicone oil with an electron beam. After the contamination cones are formed on a substrate, using one fabrication approach, a conductive layer is deposited on a portion of a cone and over the structure.Type: GrantFiled: November 5, 1984Date of Patent: June 14, 1988Assignee: International Business Machines, Corp.Inventors: Robert B. Laibowitz, Corwin P. Umbach
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Patent number: 4557995Abstract: Double sided lithography is disclosed for fabricating ultra-small multilayer microcircuit structures without need for any intermediate realignment and without need for any intermediate layer deposition involving re-establishment of surface planarity. Microcircuit patterns are defined on opposite sides of a thin substrate by an exposure tool without intermediate removal of the substrate from the exposure tool, the microcircuit pattern on one side being defined by incident patterning radiation and the microcircuit pattern on the other side being defined by patterning radiation which has passed through the thin substrate.Type: GrantFiled: October 16, 1981Date of Patent: December 10, 1985Assignee: International Business Machines CorporationInventors: Alec N. Broers, Robert B. Laibowitz
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Patent number: 4316093Abstract: Sub-100A line width patterns are formed on a member by electron beam conversion and fixing of a resist that arrives at the reaction zone point by surface migration into a resist pattern of a precise thickness and width while the member rests on an electron backscattering control support.Type: GrantFiled: October 4, 1979Date of Patent: February 16, 1982Assignee: International Business Machines CorporationInventors: Alec N. Broers, Jerome J. Cuomo, Robert B. Laibowitz, Walter W. Molzen, Jr.
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Patent number: 4197332Abstract: Sub-100A line width patterns are formed on a member by electron beam conversion and fixing of a resist that arrives at the reaction zone point by surface migration into a resist pattern of a precise thickness and width while the member rests on an electron backscattering control support. The resist is for example a contamination film from a vacuum pump oil used in evacuating the apparatus used to perform the process, e.g. silicone oil.Type: GrantFiled: February 12, 1979Date of Patent: April 8, 1980Assignee: International Business Machines CorporationInventors: Alec N. Broers, Jerome J. Cuomo, Robert B. Laibowitz, Walter W. Molzen, Jr.