Abstract: In a target to be towed by a vehicle, such as an airplane or the like, a radar transmitter and receiver each having separate antennas mounted in spaced apart relation at the front and back of the target, said transmitter being periodically pulsed and said receiver being turned on periodically at a given time after each pulse to produce a generally ellipsoidally shaped, shell-like sensitive volume around the target in which the radar will sense bullets, and the receiver being further constructed to sense only positive Doppler signals so that only bullets entering the sensitive volume will be scored.

Abstract: A standardized large scale integrated (LSI) array of standard logic cells on a single complementary metal oxide semiconductor (CMOS) chip. The pattern chosen for the layout of the standard logic cells provides very high cell density and, in combination with the "roadways" provided for power and data interconnects and the availability of "cross unders" within any cell chosen, very high utility ratios of the available cells. The standardized logic chip may be used to implement a large variety of logic circuit designs by the simple expedient of a single custom mask design for the metallization pattern for each unique use.