Abstract: A surgical generator and related method for mitigating overcurrent conditions are provided. The surgical generator includes a power supply, a radio frequency output stage, an overcurrent detection circuit in operative communication with an interrupt circuit, and a processor. The power supply generates a power signal and supplies the power signal to the radio frequency output stage. The radio frequency output stage generates a radio frequency signal from the power signal. The overcurrent detection circuit detects an overcurrent of the power signal and/or an overcurrent of the radio frequency signal. The interrupt circuit provides an interrupt signal in response to a detected overcurrent. The processor receives the interrupt signal and supplies a pulse-width modulation signal to the power supply and incrementally decreases the duty cycle of the pulse-width modulation signal in response to the interrupt signal. The radio frequency output stage may be disabled in response to the detected overcurrent.

Abstract: A system and method for transmitting electrosurgical energy from a generator to an electrosurgical instrument are provided. The electrosurgical system includes a generator adapted to generate electrosurgical energy for treating tissue. The generator includes one or more active output terminals which supply energy to the tissue. The active output terminals are operatively connected to one or more active leads. The generator also includes one or more return output terminals which returns energy from the tissue. The return output terminals are operatively connected to at least one return lead. The system also includes an electrosurgical instrument operatively connected to the one or more active leads and one or more return electrodes operatively connected to one or more return leads. The system further includes an electrosurgical cable including one or more active leads and one or more return leads.

Abstract: A method for protecting against over voltage in a power supply comprises monitoring current amplitude and direction on an output connection of a power source that combines power from a plurality of power sources, and determining occurrence of a fault condition of the monitored power source based on the current amplitude and direction. In a fault condition of the monitored power source, operation of the monitored power source subject to the fault condition is terminated while continuing operation of the plurality of power sources exclusive of the monitored power source.

Abstract: An electrosurgical generator is disclosed. The generator includes an output stage configured to generate a frequency electrosurgical waveform. A bridge rectifier is coupled to the output stage and configured to pass-through the radio frequency electrosurgical waveform and to transform at least a portion of the radio frequency electrosurgical waveform into direct current. The generator also includes an isolated current sensor configured to measure amplitude of the direct current.

Abstract: A path redundant, hardware efficient communications interconnect (1) has embodiments that can present true any-to-any interconnect capability for first and second pathways (2) and (3) and can utilize double throw switches (25) with or without single throw switches (24) perhaps in staged collectives of sub arrays (4), (5), (6), (9), and (10). A loop-back communications interconnect (22) can be accomplished by an interleaved sub array (26). A quadrilateral center stage sub array (21) can be combined with asymmetric side stage sub arrays for hardware savings that are tenths of a percent of a traditional interconnect and even present eight fold savings over prior reduced hardware interconnects.

Abstract: A switched inductor system is provided that includes a switching regulator configured to receive an input signal and provide a voltage output, the switching regulator having one or more switches and one or more inductors. The system also includes a sensing circuit in parallel with the inductor. The sensing circuit includes a first RC circuit configured to detect an alternating current component of the voltage output and a second RC circuit configured to detect a direct current component of the voltage output.

Abstract: A path redundant, hardware efficient communications interconnect (1) has embodiments that can present true any-to-any interconnect capability for first and second pathways (2) and (3) and can utilize double throw switches (25) with or without single throw switches (24) perhaps in staged collectives of sub arrays (4), (5), (6), (9), and (10). A loop-back communications interconnect (22) can be accomplished by an interleaved sub array (26). A quadrilateral center stage sub array (21) can be combined with asymmetric side stage sub arrays for hardware savings that are tenths of a percent of a traditional interconnect and even present eight fold savings over prior reduced hardware interconnects.

Abstract: A toilet multi flushing device consisting of an enclosed tank (3) filled with compressible plastic sheets (6). The tank (3) has a direct connection (1) to water supply at the bottom, an outlet at the bottom of the tank (3) with an external ball valve used as a flushing valve (10). When the valve (10) is opened the water is ejected at high speed to clear the bowl. It could be mixed with fresh air to form a mist flow. The mist streams clear the bowl. Fresh air could be substituted by the air from the trap (25) to create vacuum after the trap (25) to facilitate the clearing of the bowl.

Abstract: An electronic device is disclosed herein. An embodiment of the electronic device comprises an electronic component, wherein the electronic component is operated by a DC voltage. The electronic component comprises an AC to DC converter that converts an AC voltage to the DC voltage, wherein the RMS value of the AC voltage is greater than the DC voltage. The electronic device further comprises a power supply comprising an input and an output. The input is connectable to a line voltage and the output is connected to the AC to DC converter of electronic component. The AC voltage is output by the output of the power supply.

Abstract: An LED light bulb having separately addressable groupings of LED's. The LED light bulb can serve as a visual indicator of emergency or non-emergency conditions by selectively illuminating groupings of LED's in a variety of colors, each color corresponding to a predetermined condition.

Abstract: A method for protecting against over voltage in a power supply comprises monitoring current amplitude and direction on an output connection of a power source that combines power from a plurality of power sources, and determining occurrence of a fault condition of the monitored power source based on the current amplitude and direction. In a fault condition of the monitored power source, operation of the monitored power source subject to the fault condition is terminated while continuing operation of the plurality of power sources exclusive of the monitored power source.

Abstract: An electronic device is disclosed herein. An embodiment of the electronic device comprises an electronic component, wherein the electronic component is operated by a DC voltage. The electronic component comprises an AC to DC converter that converts an AC voltage to the DC voltage, wherein the RMS value of the AC voltage is greater than the DC voltage. The electronic device further comprises a power supply comprising an input and an output. The input is connectable to a line voltage and the output is connected to the AC to DC converter of electronic component. The AC voltage is output by the output of the power supply.

Abstract: An LED light bulb having separately addressable groupings of LED's. The LED light bulb can serve as a visual indicator of emergency or non-emergency conditions by selectively illuminating groupings of LED's in a variety of colors, each color corresponding to a predetermined condition.

Abstract: An LED light bulb having separately addressable groupings of LED's. The LED light bulb can serve as a visual indicator of emergency or non-emergency conditions by selectively illuminating groupings of LED's in a variety of colors, each color corresponding to a predetermined condition.

Abstract: Devices and methods for reducing quadrature motion in a MEMS-type gyroscope are disclosed. A MEMS-type gyroscope in accordance with an illustrative embodiment of the present invention can include one or more proof masses configured to oscillate in a drive plane above a sense electrode for measuring Coriolis forces exerted on the one or more proof masses resulting from motion of the gyroscope about an input axis. One or more quad steering voltage members can be positioned adjacent each of the one or more proof masses and activated to electrostatically attract the proof masses toward the sense electrodes to reduce quadrature motion of the proof masses. A levitation force can be induced in certain embodiments to further reduce quadrature motion of the proof masses, if desired.

Abstract: An active protection circuit for a MOSFET isolated switched power supply system operates to control the switching of the MOSFET isolation switches. A monitoring circuit operates to sense and turn off the isolation switch of the currently active power supply if it senses reverse current flowing through the switch. Simultaneously, a controller receives indication that the active power supply is out of specification, and actively switches the system voltage source to the other power supply. The controller actively ensures that the isolation switch of the out-of-specification power supply remains off until it determines otherwise.

Abstract: Techniques are provided for simultaneously addressing multiple devices on a data bus, such as by transmitting over a data bus a single message that is received and processed by multiple devices on the bus. Multiple devices may be simultaneously addressed using the standard bus architecture and protocol, without affecting the operation of other devices on the bus. In particular, a master device may address a first subset of the plurality of devices on the bus using a primary address shared by the first subset of the plurality of devices. The master device may address a second subset of the plurality of devices using a secondary address shared by the second subset of the plurality of devices. The second subset is a subset of the first subset. The master device may then transmit information over the bus to the second subset of the plurality of devices.

Abstract: Disclosed is a serial communications protocol for connecting a master and a plurality of slaves using three communication lines. The protocol establishes a method for communication between the master and any slave. Any device on the communication bus may initiate the communication. A method of arbitrating any bus collisions is also given.

Abstract: Techniques are provided for simultaneously ascertaining the status of a plurality of devices coupled to a data bus. A master device transmits at least one status request message over the data bus to a plurality of slave devices. In response, the plurality of slave devices transmit to the master device a status indicator message including a plurality of status indicators indicating statuses of the plurality of slave devices. The master device receives the status indicator message and ascertains the status of at least some of the plurality of slave devices by examining the status indicators. The status request message and/or status indicator message may be a message defined according to a protocol associated with the data bus. The data bus may, for example, be a serial data bus such as an I2C bus.

Abstract: A system and method for analyzing the effectiveness of a computer cache memory. A bus with memory transactions is monitored. A subset of addresses, along with associated transaction data, on the bus is captured and stored in a memory. The captured addresses are applied to a software model of a computer cache. The capture process is repeated multiple times, each time with a different subset of the address space. Statistical estimates of hit rate and other parameters of interest are computed based on the software model. Multiple cache configurations may be modeled for comparison of performance. Alternatively, a subset of addresses along with associated transaction data is sent to a hardware model of a cache. The contents of the hardware model are periodically dumped to memory or statistical data may be computed and placed in the memory. Statistical estimates of hit rate and other parameters of interest are computed based on the contents of the memory.