Patents by Inventor Robert Baird

Robert Baird has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7257689
    Abstract: A system for loosely coupled temporal storage management includes a logical storage aggregation including a plurality of data blocks, a data producer, one or more data consumers, and a temporal storage manager. The temporal storage manager may be configured to maintain a producer shadow store including entries stored in a log-structured logical volume, where each entry is indicative of one or more data blocks of the logical storage aggregation that have been modified by the data producer. The temporal storage manager may also be configured to maintain a repository containing a baseline version of the logical storage aggregation, and to provide the data consumers with read-only access to the producer shadow store and the repository.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: August 14, 2007
    Assignee: VERITAS Operating Corporation
    Inventor: Robert Baird
  • Publication number: 20070132020
    Abstract: Methods and apparatus are provided for TMOS devices, comprising multiple N-type source regions, electrically in parallel, located in multiple P-body regions separated by N-type JFET regions at a first surface. The gate overlies the body channel regions and the JFET region lying between the body regions. The JFET region communicates with an underlying drain region via an N-epi region. Ion implantation and heat treatment are used to tailor the net active doping concentration Nd in the JFET region of length Lacc and net active doping concentration Na in the P-body regions of length Lbody so that a charge balance relationship (Lbody*Na)=k1*(Lacc*Nd) between P-body and JFET regions is satisfied, where k1 is about 0.6?k1?1.4. The entire device can be fabricated using planar technology and the charge balanced regions need not extend through the underlying N-epi region to the drain.
    Type: Application
    Filed: December 14, 2005
    Publication date: June 14, 2007
    Inventors: Edouard de Fresart, Robert Baird, Ganming Qin
  • Publication number: 20070099308
    Abstract: Techniques are provided for sensing a first current produced by an active circuit component. According to these techniques, a current sensor is disposed over the active circuit component. The current sensor includes a Magnetic Tunnel Junction (“MTJ”) core disposed between a first conductive layer and a second conductive layer. The MTJ core can be used to sense the first current and produce a second current based on the first current sensed at the MTJ core.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Young Chung, Robert Baird, Mark Durlam
  • Publication number: 20070097732
    Abstract: An integrated circuit device is provided which includes an active circuit component and a current sensor. The active circuit component may be coupled between a first conductive layer and a second conductive layer, and is configured to produce a first current. The current sensor is disposed over the active circuit component. The current sensor may comprise a Magnetic Tunnel Junction (“MTJ”) core disposed between the first conductive layer and the second conductive layer. The MTJ core is configured to sense the first current and produce a second current based on the first current sensed at the MTJ core.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Young Chung, Robert Baird, Mark Durlam, Gregory Grynkewich, Eric salter, Jiang-Kai Zuo
  • Publication number: 20070099031
    Abstract: An integrated circuit device is provided which comprises a substrate, a conductive line configured to experience a pressure, and a magnetic tunnel junction (“MTJ”) core formed between the substrate and the current line. The conductive line is configured to move in response to the pressure, and carries a current which generates a magnetic field. The MTJ core has a resistance value which varies based on the magnetic field. The resistance of the MTJ core therefore varies with respect to changes in the pressure. The MTJ core is configured to produce an electrical output signal which varies as a function of the pressure.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 3, 2007
    Inventors: Young Chung, Robert Baird, Bradley Engel
  • Publication number: 20070076330
    Abstract: An integrated circuit device is provided which includes a heat source disposed in a substrate, and a Magnetic Tunnel Junction (“MTJ”) temperature sensor disposed over the heat source.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 5, 2007
    Inventors: Young Chung, Robert Baird, Mark Durlam
  • Publication number: 20070077664
    Abstract: Techniques of sensing a temperature of a heat source disposed in a substrate of an integrated circuit are provided. According to one exemplary method, a Magnetic Tunnel Junction (“MTJ”) temperature sensor is provided over the heat source. The MTJ temperature sensor comprises an MTJ core configured to output a current during operation thereof. The value of the current varies based on a resistance value of the particular MTJ core. The resistance value of the MTJ core varies as a function of the temperature of the heat source. A value of the current of the MTJ core can then be associated with a corresponding temperature of the heat source.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 5, 2007
    Inventors: Young Chung, Robert Baird, Mark Durlam
  • Publication number: 20070045759
    Abstract: An integrated circuit device (300) comprises a substrate (301) and MRAM architecture (314) formed on the substrate (308). The MRAM architecture (314) includes a MRAM circuit (318) formed on the substrate (301); and a MRAM cell (316) coupled to and formed above the MRAM circuit (318). Additionally a passive device (320) is formed in conjunction with the MRAM cell (316). The passive device (320) can be one or more resistors and one or more capacitor. The concurrent fabrication of the MRAM architecture (314) and the passive device (320) facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate (404, 504), resulting in three-dimensional integration.
    Type: Application
    Filed: August 31, 2005
    Publication date: March 1, 2007
    Inventors: Young Chung, Robert Baird, Mark Durlam, Gregory Grynkewich, Eric Salter
  • Publication number: 20070026558
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic electrode has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Young Chung, Robert Baird
  • Publication number: 20070025028
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. A magnetic shield is provided at least on a face of the MFS away from the MTJ. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic region has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Young Chung, Robert Baird
  • Publication number: 20070022598
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. A magnetic shield is provided at least on a face of the MFS away from the MTJ. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic region has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Young Chung, Robert Baird, Gregory Grynkewich
  • Publication number: 20070025027
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic electrode has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Young Chung, Robert Baird, Bradley Engel
  • Publication number: 20070002609
    Abstract: An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and a smart power integrated circuit architecture formed on the same substrate using the same fabrication process technology. The fabrication process technology is a modular process having a front end process and a back end process. In the example embodiment, the smart power architecture includes a power circuit component, a digital logic component, and an analog control component formed by the front end process, and a sensor architecture formed by the back end process. The MRAM architecture includes an MRAM circuit component formed by the front end process and an MRAM cell array formed by the back end process. In one practical embodiment, the sensor architecture includes a sensor component that is formed from the same magnetic tunnel junction core material utilized by the MRAM cell array.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Young Chung, Robert Baird, Mark Durlam, Gregory Grynkewich, Eric Salter
  • Publication number: 20060292754
    Abstract: An antifuse element (102, 152, 252, 302, 352, 402, 602, 652, 702) and method of fabricating the antifuse element, including a substrate material (101) having an active area (106) formed in an upper surface, a gate electrode (104) having at least a portion positioned above the active area (106), and a gate oxide layer (110) disposed between the gate electrode (104) and the active area (106). The gate oxide layer (110) including the fabrication of one of a gate oxide dip (128) or a gate oxide undercut (614). During operation a voltage applied between the gate electrode (104) and the active area (106) creates a current path through the gate oxide layer (110) and a rupture of the gate oxide layer (110) in a rupture region (130). The rupture region (130) defined by the oxide structure and the gate oxide dip (128) or the gate oxide undercut (614).
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Won Min, Robert Baird, Jiang-Kai Zuo, Gordon Lee
  • Publication number: 20060273418
    Abstract: An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and at least one inductance element formed on the same substrate using the same fabrication process technology. The inductance element, which may be an inductor or a transformer, is formed at the same metal layer (or layers) as the program lines of the MRAM architecture. Any available metal layer in addition to the program line layers can be added to the inductance element to enhance its efficiency. The concurrent fabrication of the MRAM architecture and the inductance element facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.
    Type: Application
    Filed: June 7, 2005
    Publication date: December 7, 2006
    Inventors: Young Chung, Robert Baird, Mark Durlam, Bradley Engel
  • Publication number: 20060226509
    Abstract: An antifuse element (102) having end corners (120, 122) of a gate electrode (104) positioned directly above an active area (106) or bottom electrode. The minimum programming voltage between the gate electrode (104) and the active area (106) creates a current path through an insulating layer (110) positioned therebetween. The high electric field created at the end corners (120, 122) of the gate electrode (104) results in a breakdown and rupture of the insulating layer (110) at points directly beneath the end corners (120, 122). This localization of the insulating layer (110) at the corners (120,122) provides for lower post program resistance and variation, and faster programming at a lower programming power. The antifuse elements (102) when integrated into an array (300, 320, 400, 550) provide for increased packing density. The array is fabricated to include multiple active areas (304) for individual antifuse element (302) programming or a common active area (324,405,426,506) for multi-element programming.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 12, 2006
    Inventors: Won Min, Robert Baird, Jiang-Kai Zuo, Gordon Lee
  • Publication number: 20060003551
    Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: David Mancini, Young Chung, William Dauksher, Donald Weston, Steven Young, Robert Baird
  • Patent number: 6862683
    Abstract: A method and system for protecting native libraries for Java and other applications. An application's native library may be embedded in a system of code, such as Java code, so the protections afforded the system of code are provided to the native library. At runtime, the native library may be written to a randomly selected filename in a local file system. The native library is then loaded to support native method implementations. Because the library is written to a different and randomly chosen filename each time, a hacker will not know beforehand what library is going to be used. This invention is generally useful for protecting any native library, regardless of whether it is part of a shared Java library or not. It provides any native library the same level of protection that the symbolic obfuscator, or other method of protecting Java code, gives the Java code.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: March 1, 2005
    Assignee: Novell, Inc.
    Inventors: Robert Baird Wille, Russell Lane Black
  • Patent number: 6568577
    Abstract: An apparatus for splitting solid and hollow masonry materials is provided. The apparatus includes changeable support tables and upper splitting blades to accommodate various types of masonry materials. A hydraulic ram is operated via a foot pedal to increase the pressure in the ram to raise a lower cutting blade and spring-loaded support table to exert upward and downward pressure on the material, coming it to clearly split. The upper blade is height-adjustable and the support table can be fixed in a lowered position to facilitate the splitting process by eliminating overly repetitive operation of the hydraulic ram.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: May 27, 2003
    Inventors: Charles Baird, Robert Baird, Theodore Beatty
  • Publication number: 20020056738
    Abstract: An apparatus for splitting solid and hollow masonry materials is provided. The apparatus includes changeable support tables and upper splitting blades to accommodate various types of masonry materials. A hydraulic ram is operated via a foot pedal to increase the pressure in the ram to raise a lower cutting blade and spring-loaded support table to exert upward and downward pressure on the material, coming it to clearly split. The upper blade is height-adjustable and the support table can be fixed in a lowered position to facilitate the splitting process by eliminating overly repetitive operation of the hydraulic ram.
    Type: Application
    Filed: May 23, 2001
    Publication date: May 16, 2002
    Inventors: Charles Baird, Robert Baird, Theodore Beatty