Abstract: In one embodiment, a reconfigurable and scalable hardware management architecture includes a digital controller for controlling two or more analog sense-and-control (ASC) circuits, where each ASC monitors voltage, current, and temperature of one or more power supplies, ICs, or a circuit board. The controller and ASCs are connected in a star architecture, where each ASC is connected to the controller via a different, dedicated interface to communicate regarding the power supplies being monitored. The controller and the ASCs are also connected in a bus architecture via a shared interface. The architecture can be re-configured by adding one or more additional ASCs or by removing one or more existing ASCs, where each additional ASC is (i) connected to a different I/O interface of the digital controller via a different, dedicated interface and (ii) connected to the digital controller and the two or more existing ASCs via the shared interface.

Abstract: In one embodiment, a reconfigurable and scalable hardware management architecture includes a digital controller for controlling two or more analog sense-and-control (ASC) circuits, where each ASC monitors voltage, current, and temperature of one or more power supplies, ICs, or a circuit board. The controller and ASCs are connected in a star architecture, where each ASC is connected to the controller via a different, dedicated interface to communicate regarding the power supplies being monitored. The controller and the ASCs are also connected in a bus architecture via a shared interface. The architecture can be re-configured by adding one or more additional ASCs or by removing one or more existing ASCs, where each additional ASC is (i) connected to a different I/O interface of the digital controller via a different, dedicated interface and (ii) connected to the digital controller and the two or more existing ASCs via the shared interface.

Abstract: In one embodiment, a reconfigurable and scalable hardware management architecture includes a digital controller for controlling two or more analog sense-and-control (ASC) circuits, where each ASC monitors voltage, current, and temperature of one or more power supplies (e.g., DC-to-DC converters), ICs, or a circuit board. The controller and ASCs are connected in a star architecture, where each ASC is connected to the controller via a different, dedicated interface to communicate regarding the power supplies being monitored. In addition, the controller and the ASCs are also connected in a bus architecture via a shared interface. The architecture can be re-configured by adding one or more additional ASCs or by removing one or more existing ASCs, where each additional ASC is (i) connected to a different I/O interface of the digital controller via a different, dedicated interface and (ii) connected to the digital controller and the two or more existing ASCs via the shared interface.

Abstract: A local device, such as a field-programmable gate array, has a local state machine and a local interface component for communicating with a remote device that implements a remote state machine. The local interface component receives a new set of incoming data from the remote device and determines whether the new set is good data or bad data. If good data, then the local interface component causes the new set of data to transmitted internally for use by the local state machine. If bad data, then the local interface component does not forward the new set of data to the local state machine, which instead continues to use a previously received set of good data. Although the clock rate of the local and remote state machines may differ from the frame rate of the local interface component, their operations are nevertheless synchronized.

Abstract: In one embodiment, a reconfigurable and scalable hardware management architecture includes a digital controller for controlling two or more analog sense-and-control (ASC) circuits, where each ASC monitors voltage, current, and temperature of one or more power supplies (e.g., DC-to-DC converters), ICs, or a circuit board. The controller and ASCs are connected in a star architecture, where each ASC is connected to the controller via a different, dedicated interface to communicate regarding the power supplies being monitored. In addition, the controller and the ASCs are also connected in a bus architecture via a shared interface. The architecture can be re-configured by adding one or more additional ASCs or by removing one or more existing ASCs, where each additional ASC is (i) connected to a different I/O interface of the digital controller via a different, dedicated interface and (ii) connected to the digital controller and the two or more existing ASCs via the shared interface.

Abstract: A local device, such as a field-programmable gate array, has a local state machine and a local interface component for communicating with a remote device that implements a remote state machine. The local interface component receives a new set of incoming data from the remote device and determines whether the new set is good data or bad data. If good data, then the local interface component causes the new set of data to transmitted internally for use by the local state machine. If bad data, then the local interface component does not forward the new set of data to the local state machine, which instead continues to use a previously received set of good data. Although the clock rate of the local and remote state machines may differ from the frame rate of the local interface component, their operations are nevertheless synchronized.

Abstract: In one embodiment, an integrated circuit includes a pin and a current source for driving current through the pin into an external resistor such as a resistor on a circuit board to generate a pin voltage. The integrated circuit includes an analog-to-digital converter for converting the pin voltage into a digital value, such as an address for the integrated circuit.

Abstract: Systems and methods are disclosed herein to provide channel-to-channel skew control in accordance with one or more embodiments of the present invention. For example in accordance with an embodiment, a method of adjusting skew between first and second channels includes receiving a first channel output signal and a second channel output signal from the first and second channels, respectively; detecting a phase difference between the first channel output signal and the second channel output signal; and controlling, based on the detected phase difference, a signal delay within at least the first channel or the second channel to reduce skew between the first channel output signal and the second channel output signal.

Abstract: In one embodiment of the invention, a bipolar junction transistor (BJT) includes an emitter comprised of a first doped region doped with a first dopant of a first conductivity type. In addition, a salicide block is disposed over a periphery portion of the first doped region, and a salicide is formed on an exposed portion of the first doped region inside the periphery portion. Such a salicide block prevents formation of salicide down to a base region in turn preventing leakage current through the base for increased ? of the BJT.

Abstract: A bandgap reference circuit can use various output stages to implement a controlled feedback method of sensing and supplying the needed load current through a sensing network. A small amount of circuitry can be added to a class AB output stage to decouple the bandgap reference feedback from a capacitive load and simultaneously sense load current needs and boost current as needed while minimizing voltage droop. Such circuits can be implemented using relatively compact designs while still reducing droop, and thus allowing the use of a large external capacitor to reduce noise and maintain good power supply rejection.

Abstract: The invention relates to a hydraulic striking mechanism including a cylinder, a percussion piston guided therein and a piston return device which is supported on the percussion piston and is displaceable independently thereof and can be connected on its side facing the percussion piston tip alternatingly to a pressure source or a pressure-free return conduit. The piston return device is configured as an annular piston which is freely displaceable along the percussion piston and the cylinder and forms therewith a piston chamber. The percussion piston has an abutment face at its end remote from the percussion piston tip which cooperates with the annular piston for moving percussion piston in the return stoke direction. The percussion piston, together with the cylinder, defines an oil chamber which axially follows the piston chamber in a spaced relationship. The percussion piston is provided with a cylindrical shoulder within the oil chamber which determines its end position during the return stroke.