Patents by Inventor Robert Buono

Robert Buono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11899481
    Abstract: A feedback control circuit is described herein, comprising: an operational amplifier (op-amp) integrated circuit, wherein a first output of the op-amp provides a feedback error control signal; at least two transistors provided in a feedback path between the first output of the op-amp and an inverting input to the op-amp; and a plurality of discrete electrical components in the feedback path, such that in the response to either an increase or decrease of an inverting input voltage at the inverting input that exceeds a predetermined level, will speed up substantially. The feedback control circuit provides the feedback error control signal.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: February 13, 2024
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 11575353
    Abstract: An audio amplifier system is described herein, comprising: an amplifier adapted to amplify an audio signal and comprising an output enable/disable input, the amplifier further adapted to receive an output enable signal at the output enable/disable input that enables/disables an output of the amplifier; a Zobel network connected to the output of the audio amplifier and comprising a Zobel capacitor and a Zobel resistor arranged such that they form a high pass frequency filter function and wherein the Zobel network is adapted to be substantially resistive when a frequency of an audio signal output from the audio amplifier is within a first frequency range; a mirroring resistor connected in parallel to the Zobel resistor and adapted to mirror a power that is dissipated in the Zobel resistor, and wherein a printed circuit board upon which the mirroring resistor is located is adapted to conduct heat generated by the mirroring resistor; a negative temperature coefficient (NTC) resistor located in close proximity to
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: February 7, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Publication number: 20220129026
    Abstract: A feedback control circuit is described herein, comprising: an operational amplifier (op-amp) integrated circuit, wherein a first output of the op-amp provides a feedback error control signal; at least two transistors provided in a feedback path between the first output of the op-amp and an inverting input to the op-amp; and a plurality of discrete electrical components in the feedback path, such that in the response to either an increase or decrease of an inverting input voltage at the inverting input that exceeds a predetermined level, will speed up substantially. The feedback control circuit provides the feedback error control signal.
    Type: Application
    Filed: October 22, 2021
    Publication date: April 28, 2022
    Applicant: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Publication number: 20220069781
    Abstract: An audio amplifier system is described herein, comprising: an amplifier adapted to amplify an audio signal and comprising an output enable/disable input, the amplifier further adapted to receive an output enable signal at the output enable/disable input that enables/disables an output of the amplifier; a Zobel network connected to the output of the audio amplifier and comprising a Zobel capacitor and a Zobel resistor arranged such that they form a high pass frequency filter function and wherein the Zobel network is adapted to be substantially resistive when a frequency of an audio signal output from the audio amplifier is within a first frequency range; a mirroring resistor connected in parallel to the Zobel resistor and adapted to mirror a power that is dissipated in the Zobel resistor, and wherein a printed circuit board upon which the mirroring resistor is located is adapted to conduct heat generated by the mirroring resistor; a negative temperature coefficient (NTC) resistor located in close proximity to
    Type: Application
    Filed: August 24, 2021
    Publication date: March 3, 2022
    Applicant: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 10686410
    Abstract: A rail balancing circuit is described herein for use with a power supply, the RBC comprising: a circuit adapted to respond to over-voltage and under-voltage conditions in the power supply that comprises a positive rail voltage source and a negative rail voltage source, such that any deviation from a balanced condition between the positive rail voltage source and the negative rail voltage source is substantially instantaneously corrected to bring both the positive and negative rail voltage sources back to the balanced condition.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: June 16, 2020
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Publication number: 20180323753
    Abstract: A rail balancing circuit is described herein for use with a power supply, the RBC comprising: a circuit adapted to respond to over-voltage and under-voltage conditions in the power supply that comprises a positive rail voltage source and a negative rail voltage source, such that any deviation from a balanced condition between the positive rail voltage source and the negative rail voltage source is substantially instantaneously corrected to bring both the positive and negative rail voltage sources back to the balanced condition.
    Type: Application
    Filed: July 2, 2018
    Publication date: November 8, 2018
    Applicant: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 10014831
    Abstract: A rail balancing circuit is described herein for use with a power supply, the RBC comprising: a circuit adapted to respond to over-voltage and under-voltage conditions in the power supply that comprises a positive rail voltage source and a negative rail voltage source, such that any deviation from a balanced condition between the positive rail voltage source and the negative rail voltage source is substantially instantaneously corrected to bring both the positive and negative rail voltage sources back to the balanced condition.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: July 3, 2018
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 9806683
    Abstract: Described herein are several configurations of Class-D audio amplifiers, including a single-ended and a bridge-tied load (BTL) configuration, in which voltage-mode control and average current-mode control circuitry in feedback loops can be included to control the outputs of the Class-D amplifier to reduce open-loop errors and maintain a relatively high loop gain over an expected audio frequency range. The average current-mode control circuitry monitors current through a resistor common to both a current flow into a positive terminal of a loudspeaker associated with the amplifier and a current flow into a negative terminal of the loudspeaker. The voltage-mode control circuitry works with the average current-mode control circuitry in controlling the output of the Class-D audio amplifier.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: October 31, 2017
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: 9716478
    Abstract: A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers).
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: July 25, 2017
    Assignee: Crestron Electronics, Inc.
    Inventors: Robert Buono, Dennis Fink
  • Patent number: 9680428
    Abstract: A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers).
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: June 13, 2017
    Inventor: Robert Buono
  • Patent number: 9654069
    Abstract: A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers).
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: May 16, 2017
    Inventor: Robert Buono
  • Patent number: 9647617
    Abstract: A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers).
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: May 9, 2017
    Inventors: Robert Buono, Dennis Fink
  • Publication number: 20170054421
    Abstract: A multi-channel Class D audio amplifier is provided to substantially reduce channel-to-channel crosstalk by employing in each channel a local triangle ramp generator controlled by a single global digital timing signal. The noise critical timing/integrating capacitor for the triangle ramp generator resides locally in each channel and adjacent to the PWM comparator of that channel and referenced to the local ground of that channel. The amplifier can also include a duty cycle limitation circuit to limit output power availability depending on the impedance of any attached loads (speakers).
    Type: Application
    Filed: November 8, 2016
    Publication date: February 23, 2017
    Inventors: Robert Buono, Dennis Fink
  • Patent number: D979500
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: February 28, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: D979501
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: February 28, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: D979502
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: February 28, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: D979503
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: February 28, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: D979504
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: February 28, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: D979505
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: February 28, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono
  • Patent number: D980164
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: March 7, 2023
    Assignee: Crestron Electronics, Inc.
    Inventor: Robert Buono