Patents by Inventor Robert C. Abbe
Robert C. Abbe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6255664Abstract: A sub sensor for measuring a small area is integrally incorporated in a main sensor for measuring a large area and a part in the vicinity of the edge of a wafer is measured by the sub sensor, while a center of a wafer is measured by the main sensor.Type: GrantFiled: April 5, 1999Date of Patent: July 3, 2001Assignees: Super Silicon Crystal Research Institute Corp., ADE CorporationInventors: Shinji Okawa, Robert C. Abbe
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Patent number: 5511005Abstract: A system for semiconductor wafer processing including wafer measurement and characterization having vertical wafer processing apparatus with which only the edge of a wafer is contacted. A wafer processing station is provided having a support bridge to which a rotor subassembly is attached. The rotor subassembly includes a housing and a rotor having a central aperture and a retention mechanism for retaining a wafer in a measurement position. A pair of pivotable probe arms includes one probe arm positioned on either side of the wafer. A sensor provides an image of a wafer prior to its retention by the retention mechanism in the measurement position in order to permit the retention mechanism to avoid any flat on the wafer. Additional sensors eliminate the effect of wobble or vibration of the rotor on wafer measurement results. Artifact removal processors are provided for removing errors in the measured wafer data and a database stores the uncorrupted and corrected data.Type: GrantFiled: February 16, 1994Date of Patent: April 23, 1996Assignee: ADE CorporationInventors: Robert C. Abbe, Noel S. Poduje, Randal K. Goodall, Peter Domenicali
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Patent number: 4910453Abstract: An error compensated thickness measuring system utilizing first and second probes placed on opposite sides of a semiconductor wafer whose thickness is to be measured. The output of the probes is linearized and electronically processed to provide a signal representative of the thickness of the semiconductor wafer. The electronic processing includes an error compensating circuit which removes higher order error in the thickness signal attributable to the wafer being other than precisely centered between the two probes. The error compensating circuitry operates to produce a scaled higher order representation of the displacement of the wafer from the centered condition to combine this with the thickness signal to produce an error compensated signal.Type: GrantFiled: October 15, 1987Date of Patent: March 20, 1990Assignee: ADE CorporationInventors: Robert C. Abbe, Noel S. Poduje
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Patent number: 4897015Abstract: A robot arm in which a hand or end effector placed at the end of, and pivotally joined to first and second pivotally coupled arms is caused to experience linear, straight line motion in response to a single rotary actuator at the far end of the further most arm. A series of belts and pulleys of different sizes coordinate the motion of the two arms and the hand in order to produce straight line or radial motion in response to a single rotary actuator. The robot arm has particular application in semiconductor wafer handling systems in such capacity as transferring wafers between storage cassettes and test platforms and in this application is married to Z and .theta. motion drives.Type: GrantFiled: May 15, 1987Date of Patent: January 30, 1990Assignee: ADE CorporationInventors: Robert C. Abbe, David G. Baker
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Patent number: 4860229Abstract: An automatic wafer flatness station is disclosed for obtaining a flatness profile of a semiconductor wafer or other sample from thickness data. The sample to be flatness profiled is supported so that it maintains its natural shape. A processor coupled to a capacitive thickness sensing head and to the support medium is operative to successively position each of a plurality of preselected points of the sample into proximity with the capacitive thickness sensing head for measuring the thickness of the sample at the corresponding point. An analog-to-digital converter converts the thickness measurement into data that is stored in a data table in system memory, the individual addresses of which correspond to the spacial location on the sample of each such preselected point. The processor is operative after the data table is compiled for each sample to compute the flatness profile of one surface therefrom relative to a selectable plane.Type: GrantFiled: December 9, 1988Date of Patent: August 22, 1989Assignee: ADE CorporationInventors: Robert C. Abbe, Noel S. Poduje, Neil H. Judell
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Patent number: 4849916Abstract: The present invention discloses means and method for obtaining an increased spacial resolution from a sensor that includes a probe having a characteristic physical dimension that limits its spacial resolution. Such a probe may include a rectangular sensing surface wherein the probe sensitivity increases with surface area while the spacial resolution decreases with increasing surface area. The probe and an object to be measured are controllably moved relatively to each other in such a way as to define preselected increments of relative movement that are selected to be a fraction of the characteristic physical dimension of the probe.Type: GrantFiled: April 30, 1985Date of Patent: July 18, 1989Assignee: Ade CorporationInventors: Robert C. Abbe, Neil H. Judell, Noel S. Poduje
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Patent number: 4457664Abstract: An automatic wafer alignment station is disclosed for aligning a wafer having flats about its centroid with the flats oriented in a preselected spatial direction. The wafer is held by a vacuum chuck which is operatively connected to a motor driven carriage for controlled movement about an X axis, to a .theta. actuator carried by the carriage for controlled rotation about the axis of the chuck, and to a Z actuator carried by the carriage for controlled motion about a Z axis. An X capacitive sensor and a Z capacitive sensor are positioned near the wafer. An X processing and Z compensating circuit is responsive to the X and the Z capacitive sensor output signals and provides an electrical signal that has values which exclusively represent the position of the edge of the wafer along the X axis only over a predetermined angular range. Circuit means including an A/D converter and a microprocessor respond to the electrical signal and produce a plurality of corrective signals to the X, Y, and .theta.Type: GrantFiled: March 22, 1982Date of Patent: July 3, 1984Assignee: ADE CorporationInventors: Neil H. Judell, Robert C. Abbe, Noel S. Poduje, Roy Mallory
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Patent number: 4353029Abstract: A self inverting gauging system for such parameters as capacitively sensed distance or inductively sensed resistivity in which the sensor provides an output inversely varying with the dimension of interest. The gauge typically includes a dual slope integrator responsive to a reference value on the up integration and to the sensor output on the down integration. The interval of the down integration necessary to reset the integrator to the original value varies directly, rather than inversely, with the dimension of interest and is typically provided as the digital output indication of a counter. In the application to resistivity gauging, the up integration reference signal is preferably provided by the output of a thickness gauge such that the ultimate counter display represents element resistivity compensated for thickness.Type: GrantFiled: February 29, 1980Date of Patent: October 5, 1982Assignee: ADE CorporationInventors: Robert C. Abbe, Noel S. Poduje
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Patent number: 4228392Abstract: A system for reducing higher order nonlinearities in the linearized output of a dimension gauging probe in which the dimension gauging probe provides an output varying inversely with the physical dimension gauged which is in turn linearized to a signal varying proportionally with the physical dimension. Higher order nonlinearities, an error condition, which deviate the correspondence between the gauged dimension and the output from a linear or straight-line function, are reduced by feedback of the linearized output to the probe and, preferably, by feedforward of a portion of the probe output signal to the linearized signal.Type: GrantFiled: October 11, 1977Date of Patent: October 14, 1980Assignee: Ade CorporationInventors: Robert C. Abbe, Noel S. Poduje, Daniel Klein
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Patent number: 4217542Abstract: A self inverting gauging system for such parameters as capacitively sensed distance or inductively sensed resistivity in which the sensor provides an output inversely varying with the dimension of interest. The gauge typically includes a dual slope integrator responsive to a reference value on the up integration and to the sensor output on the down integration. The interval of the down integration necessary to reset the integrator to the original value varies directly, rather than inversely, with the dimension of interest and is typically provided as the digital output indication of a counter. In the application to resistivity gauging, the up integration reference signal is preferably provided by the output of a thickness gauge such that the ultimate counter display represents element resistivity compensated for thickness.Type: GrantFiled: February 13, 1978Date of Patent: August 12, 1980Assignee: ADE CorporationInventors: Robert C. Abbe, Noel S. Poduje
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Patent number: 4158171Abstract: A noncontact gauge for edge detecting of semiconductor wafers in a test rig which indexes between circuits in the semiconductor wafer to provide functional tests upon them. The noncontact gauge includes a capacitive probe having an elongated finger that is bent into position a few thousands of an inch above the wafer when positioned for circuit tests in order to detect whether the circuit test system, in indexing from circuit to circuit in the row and column matrix of integrated circuit chips in the wafer, has moved to one edge or the other of the water. The edge detection system operates with conventional wafer test systems which raise and lower the wafer between tests to index from one integrated circuit to the next in the wafer matrix.Type: GrantFiled: September 14, 1977Date of Patent: June 12, 1979Assignee: ADE CorporationInventors: Robert C. Abbe, Noel S. Poduje
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Patent number: 3990005Abstract: A system for capacitively gauging distance to an element which is not in a low impedance path to ground. The gauging system operates to provide an indication of distance with the potential on the element at a defined level, typically ground. Several embodiments are presented for making this measurement. A first operates to measure distance at periodic instances when the defined potential exists. A second embodiment uses phase opposite excitation to produce a defined potential at the element either by specific placement of the element or through a feedback control over element potential. The system of the present invention may be adapted for use in capacitive thickness measurement on an ungrounded or highly resistive element.Type: GrantFiled: September 3, 1974Date of Patent: November 2, 1976Assignee: Ade CorporationInventors: Robert C. Abbe, Noel S. Poduje