Abstract: Described herein are various technologies for metrics-based assessment and trust verification of netlists for hardware logic devices (e.g., ASICs, FPGAs, etc.). A computing system translates a netlist of a hardware logic device into a Boolean network. The computing system generates and assigns metrics to edges of the Boolean network. The metrics comprise a coverage metric, a rare trigger metric, and an influence metric. Based upon the metrics, the computing system assigns the nodes in the Boolean network criticality values. The computing system determines a likelihood of a vulnerability in the netlist based upon the criticality values. The computing can output an indication as to whether the netlist is trusted based upon the determined likelihood of a vulnerability in the netlist.

Abstract: Provided herein are methods of treating a proliferative disease in a subject, comprising administering to the subject a therapeutically effective amount of AC220 and a nucleoside analog, a topoisomerase inhibitor or an anthracycline, or a combination thereof.

Abstract: Embodiments of the present invention are directed toward authentication systems, devices, and methods. Obfuscated executable instructions may encode an authentication procedure and protect an authentication key. The obfuscated executable instructions may require communication with a remote certifying authority for operation. In this manner, security may be controlled by the certifying authority without regard to the security of the electronic device running the obfuscated executable instructions.

Abstract: Provided herein are methods of treating a proliferative disease in a subject, comprising administering to the subject a therapeutically effective amount of AC220 and a nucleoside analog, a topoisomerase inhibitor or an anthracycline, or a combination thereof.

Abstract: A basic cell circuit architecture having plurality of cells with fixed transistors configurable for the formation of logic devices and single and dual port memory devices within a structured ASIC is provided. Different configurations of ensuing integrated circuits are achieved by forming variable interconnect layers above the fixed structures. The circuit architecture can achieve interconnection of transistors within a single cell or across multiple cells. The interconnection can be configured to form basic logic gates as well as more complex digital and analog subsystems. In addition, each cell contains a layout of transistors that can be variably coupled to achieve a memory device, such as a SRAM device. By having the capability of forming a logic circuit element, a memory device, or both, the circuit architecture is both memory-centric and logic-centric, and more fully adaptable to modern-day SoCs.

Abstract: Provided herein are methods of treating a proliferative disease in a subject, comprising administering to the subject a therapeutically effective amount of AC220 and a nucleoside analog, a topoisomerase inhibitor or an anthracycline, or a combination thereof.

Abstract: Embodiments of the present invention are directed toward authentication systems, devices, and methods. Obfuscated executable instructions may encode an authentication procedure and protect an authentication key. The obfuscated executable instructions may require communication with a remote certifying authority for operation. In this manner, security may be controlled by the certifying authority without regard to the security of the electronic device running the obfuscated executable instructions.

Abstract: A basic cell circuit architecture having plurality of cells with fixed transistors configurable for the formation of logic devices and single and dual port memory devices within a structured ASIC is provided. Different configurations of ensuing integrated circuits are achieved by forming variable interconnect layers above the fixed structures. The circuit architecture can achieve interconnection of transistors within a single cell or across multiple cells. The interconnection can be configured to form basic logic gates as well as more complex digital and analog subsystems. In addition, each cell contains a layout of transistors that can be variably coupled to achieve a memory device, such as a SRAM device. By having the capability of forming a logic circuit element, a memory device, or both, the circuit architecture is both memory-centric and logic-centric, and more fully adaptable to modern-day SoCs.

Abstract: A basic cell circuit architecture having plurality of cells with fixed transistors configurable for the formation of logic devices and/or single/dual port memory devices within a structured ASIC is provided. Different configurations of ensuing integrated circuits are achieved by forming variable interconnect layers above the fixed structures. The circuit architecture can achieve interconnection of transistors within a single cell and/or across multiple cells. The interconnection can be configured to form basic logic gates as well as more complex digital and analog subsystems. In addition, each cell contains a layout of transistors that can be variably coupled to achieve a memory device, such as a SRAM device. By having the capability of forming either a logic circuit element, a memory device, or both, the circuit architecture is both memory-centric and logic-centric, and more fully adaptable to modern-day SoCs.

Abstract: Provided herein is a method of preventing, treating, or ameliorating one or more symptoms of an adenosine A3-mediated condition, disorder, or disease, with a compound of Formula I. Also provided herein is a method of preventing, treating, or ameliorating one or more symptoms of glaucoma or ocular hypertension. Further provided herein is a method of modulating the activity of an adenosine A3 receptor.

Abstract: Provided herein are methods of treating a proliferative disease in a subject, comprising administering to the subject a therapeutically effective amount of AC220 and a nucleoside analog, a topoisomerase inhibitor or an anthracycline, or a combination thereof.

Abstract: A basic cell circuit architecture having plurality of cells with fixed transistors configurable for the formation of logic devices and/or single/dual port memory devices within a structured ASIC is provided. Different configurations of ensuing integrated circuits are achieved by forming variable interconnect layers above the fixed structures. The circuit architecture can achieve interconnection of transistors within a single cell and/or across multiple cells. The interconnection can be configured to form basic logic gates as well as more complex digital and analog subsystems. In addition, each cell contains a layout of transistors that can be variably coupled to achieve a memory device, such as a SRAM device. By having the capability of forming either a logic circuit element, a memory device, or both, the circuit architecture is both memory-centric and logic-centric, and more fully adaptable to modern-day SoCs.

Abstract: The invention provides a single-well, microscale method of determining the specific apoptotic activity of a cell. The method consists of contacting a cell population of about 1×105 cells for a time period of between about 30 minutes and 4 hours with a sufficient volume of medium containing an apoptotic specific diagnostic reagent and a diagnostic accessory reagent so as to cover the cell population, and determining the activity of the apoptotic specific diagnostic reagent. The invention also provides a method of identifying a compound which induces apoptosis. The invention further provides a rapid method of identifying a compound which inhibits apoptosis.

Abstract: The invention provides a single-well, microscale method of determining the specific apoptotic activity of a cell. The method consists of contacting a cell population of about 1×105 cells for a time period of between about 30 minutes and 4 hours with a sufficient volume of medium containing an apoptotic specific diagnostic reagent and a diagnostic accessory reagent so as to cover the cell population, and determining the activity of the apoptotic specific diagnostic reagent. The invention also provides a method of identifying a compound which induces apoptosis. The invention further provides a rapid method of identifying a compound which inhibits apoptosis.

Abstract: The invention provides a single-well, microscale method of determining the specific apoptotic activity of a cell. In the various embodiments, the method comprising contacting a cell population of greater than about 10,000 to 1×106 cells for a time period of between about 30 minutes and 4 hours with a sufficient volume of medium containing an apoptotic specific diagnostic reagent and a diagnostic accessory reagent so as to cover the cell population, and determining the activity of the apoptotic specific diagnostic reagent. The invention also provides a method of identifying a compound which induces apoptosis. The invention further provides a rapid method of identifying a compound which inhibits apoptosis.

Abstract: The invention provides a single-well, microscale method of determining the specific apoptotic activity of a cell. The method consists of contacting a cell population of about 1×105 cells for a time period of between about 30 minutes and 4 hours with a sufficient volume of medium containing an apoptotic specific diagnostic reagent and a diagnostic accessory reagent so as to cover the cell population, and determining the activity of the apoptotic specific diagnostic reagent. The invention also provides a method of identifying a compound which induces apoptosis. The invention further provides a rapid method of identifying a compound which inhibits apoptosis.

Abstract: A water tank assembly for mounting between a motor vehicle frame member and the lower portion of a body panel along a side of the vehicle. The assembly includes, typically, a plastic cylindrical tank and at least two straps having an adjustable length and J-bolts at the ends for securing the tank to the typically channel section frame member. Saddle members are provided to fill the space between the tank and frame member. Preferably, shallow strap-receiving grooves are provided around the tank to hold the straps in position. A valved fill/dispense tube is provided near the lower tank side through which the tank is filled and which dispenses water as needed. An overflow device, typically a sprinkler system "bubbler" is provided at the top of the tank. The tank fill/dispense tube is readily accessible just below the vehicle body side while the tank is out of sight behind the side panel.