Patents by Inventor Robert C. Bedichek

Robert C. Bedichek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4803622
    Abstract: An I/O bus sequencer for providing a data path between an execution Unit (EU-10), a register file (14) and devices connected to a bus (28). A programmable logic array (PLA-18) stores a program which controls a service table (20). The service table includes a plurality of entries divided into fields. One of the fields when decoded instructs the PLA as to what kind of operation the bus sequencer is to perform. Line selection (priority) logic (22) connected to I/O request lines (30) and to the service table (20) determines which service table entry the PLA is to use. A bus interface connected to the I/O bus ports (26) and to the PLA (18) routes data between the I/O bus ports (26) and the register file (14), entries of which are controlled by use of register sets. The service table fields include register set descriptors for storing the status of register set buffers.
    Type: Grant
    Filed: May 7, 1987
    Date of Patent: February 7, 1989
    Assignee: Intel Corporation
    Inventors: William L. Bain, Jr., Robert C. Bedichek, George W. Cox, Gerhard Grassl, Craig B. Peterson, Justin R. Rattner, Gurbir Singh, Gurbir Singh, John L. Wipfli