Patents by Inventor Robert C. De Ward

Robert C. De Ward has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4241401
    Abstract: Apparatus for use within a virtual memory data processing system offering a way of protecting data used at one interrupt level state from unauthorized use at another interrupt level state. A virtual memory data processing system permits a computer program to specify relative (or virtual) addresses rather than physical (or real) addresses. Most practical virtual memory data processing systems utilize a Virtual Address Translator (VAT), often called a Directory Look-Aside Table (DLAT). The VAT contains a plurality of internal conversion tables which perform virtual address to real address translation. A binary code, called the Interrupt Level Code (ILC), is appended to the virtual address of entries within the plurality of internal conversion tables within the VAT to permit the VAT to translate virtual addresses to real addresses only if the present Central Processing Unit (CPU) interrupt level state corresponds to the interrupt level state denoted by the ILC within the VAT.
    Type: Grant
    Filed: December 19, 1977
    Date of Patent: December 23, 1980
    Assignee: Sperry Corporation
    Inventors: Robert C. De Ward, David G. Kaminski, Mickiel P. Fedde
  • Patent number: 4155119
    Abstract: A method of addressing memory in a digital computer where a plurality of devices are connected to a single input/output channel to the digital computer communicate with the digital computer by externally specifying the memory address of the data word or words to be transferred to or from the digital computer. More specifically, the invention provides a method for treating the externally specified address coming from one of the multiple devices external to the digital computer as a virtual address. Thus, an input/output process operating in the digital computer may operate within the digital computer's system virtual address space. This method allows input/output processes to be able to utilize the address mapping subsystem of the central processor of the digital computer. The method of memory addressing utilizes a subchannel page table for each one of the multiple devices connected to one input/output channel in addition to a channel page table utilized for each individual input/output channel.
    Type: Grant
    Filed: September 21, 1977
    Date of Patent: May 15, 1979
    Assignee: Sperry Rand Corporation
    Inventors: Robert C. De Ward, Kenneth J. Thurber