Patents by Inventor Robert C. Frame

Robert C. Frame has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7310222
    Abstract: A flat-panel display with fixtures in its sidewalls to enable support by lateral mounting members is disclosed. The advantage of this approach, in which the fixtures are essentially rotated around to the sides of the flat-panel display, is the reduction in the portion of the portable computer's top cover that is not the active display. In practice, this results in an increase in the size of the display that may be housed in the same-sized top cover. In order to accommodate the lateral mounting of the flat-panel display, metal brackets are used. These brackets extend from the base unit hinges and cradle the display. This adds torsional rigidity, but also removes the requirement that the back must be structural. Further reductions in the inactive portions of the top cover may be achieved by extending the ends of the display's fluorescent back-light beyond or through the metal rim that surrounds the display.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: December 18, 2007
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Michele Bovio, Robert C. Frame
  • Patent number: 6982702
    Abstract: A portable computer system includes one or more battery connectors, a portable base computer, and a portable user interface module. The base computer includes a wireless receiver, and a processor having a data input operatively connected to the receiver and a power input operatively connected to at least one of the connectors. The base computer also includes mass storage operatively connected to the processor, and a wireless transmitter operatively connected to the processor. The user interface module includes a wireless receiver and a two-dimensional display having a data input operatively connected to the receiver and a power input operatively connected to at least one of the connectors. The user interface device further includes a user interface device and a wireless transmitter operatively connected to the user interface device.
    Type: Grant
    Filed: June 12, 1998
    Date of Patent: January 3, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Robert C. Frame
  • Patent number: 6838810
    Abstract: A flat-panel display with fixtures in its sidewalls to enable support by lateral mounting members is disclosed. The advantage of this approach, in which the fixtures are essentially rotated around to the sides of the flat-panel display, is the reduction in the portion of the portable computer's top cover that is not the active display. In practice, this results in an increase in the size of the display that may be housed in the same-sized top cover. In order to accommodate the lateral mounting of the flat-panel display, metal brackets are used. These brackets extend from the base unit hinges and cradle the display. This adds torsional rigidity, but also removes the requirement that the back must be structural. Further reductions in the inactive portions of the top cover may be achieved by extending the ends of the display's fluorescent back-light beyond or through the metal rim that surrounds the display.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: January 4, 2005
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Michele Bovio, Robert C. Frame
  • Patent number: 6778385
    Abstract: A portable computer has pivotally connected base and display screen lid housings and is provided with a generally wedge-shaped auxiliary component housing which is releasably latchable to the bottom of the base housing and extends across only a rear underside portion of the base housing. The attached auxiliary housing representatively carries a CD/DVD media drive unit and a floppy disk drive unit, operatively couples them to various computer components in the base housing, and is configured to rearwardly and upwardly tilt he base housing keyboard at a predetermined comfortable typing angle when the base housing is placed atop a horizontal work surface such as a desktop.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: August 17, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Daniel V. Forlenza, Jitender K. Kanjiram, Robert C. Frame, Michele Bovio
  • Publication number: 20020114131
    Abstract: A portable computer has pivotally connected base and display screen lid housings and is provided with a generally wedge-shaped auxiliary component housing which is releasably latchable to the bottom of the base housing and extends across only a rear underside portion of the base housing. The attached auxiliary housing representatively carries a CD/DVD media drive unit and a floppy disk drive unit, operatively couples them to various computer components in the base housing, and is configured to rearwardly and upwardly tilt he base housing keyboard at a predetermined comfortable typing angle when the base housing is placed atop a horizontal work surface such as a desktop.
    Type: Application
    Filed: April 23, 2002
    Publication date: August 22, 2002
    Inventors: Daniel V. Forlenza, Jitender K. Kanjiram, Robert C. Frame, Michele Bovio
  • Patent number: 6392880
    Abstract: A portable computer has pivotally connected base and display screen lid housings and is provided with a generally wedge-shaped auxiliary component housing which is releasably latchable to the bottom of the base housing and extends across only a rear underside portion of the base housing. The attached auxiliary housing representatively carries a CD/DVD media drive unit and a floppy disk drive unit, operatively couples them to various computer components in the base housing, and is configured to rearwardly and upwardly tilt he base housing keyboard at a predetermined comfortable typing angle when the base housing is placed atop a horizontal work surface such as a desktop.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: May 21, 2002
    Assignee: Compaq Computer Corporation
    Inventors: Daniel V. Forlenza, Jitender K. Kanjiram, Robert C. Frame, Michele Bovio
  • Patent number: 6216192
    Abstract: A system and method to permit access requests from a mezzanine bus through different bridges to perform in similar ways in disclosed. The access requests are serviced even if the bridges are configured differently, therefore allowing hardware and software management by allowing software to treat peripheral devices attached to different types of bridges as similar devices. Features of the peripheral devices, therefore, can be more effectively and more fully accessed by evading limitations of the addressing mode for one or more of the bridges.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: April 10, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Robert C. Frame, Premanand Sakarda, Mark Sawyer, Richard Hennessy
  • Patent number: 6170020
    Abstract: A computer including a computer housing having a processor and a number of peripheral devices operatively connected to the processor, a docking connector mounted on the computer housing and operatively connected to the processor, a reservation module operative to reserve one of a plurality of resources for use by a peripheral device operatively connected to a docking station that is operatively connectable to the docking connector, and an allocation module responsive to an indication from the reservation module operative to allocate the one of the resources to one of the plurality of peripheral devices.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: January 2, 2001
    Assignee: Compaq Computer Corporation
    Inventors: Stephen R. Blakeney, Scott L. Pirdy, Robert C. Frame
  • Patent number: 6125034
    Abstract: A computer having a case has a connection point for a communications line, where the connection point is accessible from outside the case. A socket receives a standard communications hardware card, the hardware card having a first receptacle to electrically connect to circuits of the computer, and the hardware card having a second receptacle to electrically connect to an exterior electrical circuit, the exterior electrical circuit usually being exterior to the case. A mounting means attaches the socket to the computer, the mounting means positioning the socket to facilitate a connection to the second receptacle of the hardware card, the connection located wholly internal to the case. A multi wire connector electrically connects to the second receptacle of the hardware card, and the multi wire connector is located wholly internal to the case.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: September 26, 2000
    Assignee: Digital Equipment Corporation
    Inventors: Michele Bovio, Mark Foster, Robert C. Frame, John H. Mallard
  • Patent number: 6005368
    Abstract: A portable computer and docking station combination, comprising first and second batteries and first and second battery charging circuit portions, with automatic sequencing of charging between the batteries. The system includes means for charging a first battery based on an amount of current flowing into the computer circuitry, and means for charging a second battery based on an amount of current flowing into the first battery and into the computer circuitry.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: December 21, 1999
    Assignee: Digital Equipment Corporation
    Inventor: Robert C. Frame
  • Patent number: 5638532
    Abstract: Computer systems using a processor that is capable of operating in a system management mode (SMM) employ a dedicated system management RAM (SMRAM). The processor uses the SMRAM when the processor is performing a task associated with the SMM. The processor is capable of generating a range of system addresses. The range includes a particular subrange of system addresses that are used for accessing the SMRAM. A memory controller decodes the system addresses generated by the processor and enables access to the SMRAM, regardless of whether the processor is operating in the SMM, when the controller decodes a system address of the particular subrange. The range of system addresses also includes a second subrange. The memory controller also enables access to the SMRAM when the processor is operating in the SMM and the controller decodes a system address of the second subrange. The memory controller indicates to the processor whether data associated with the enabled SMRAM can be stored in a cache memory.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: June 10, 1997
    Assignee: Digital Equipment Corporation
    Inventors: Robert C. Frame, Mark J. Foster
  • Patent number: 5544344
    Abstract: An apparatus and method for caching SMRAM in an Intel.RTM. CPU employing system management mode. A cache for the CPU includes a plurality of data entries and an SMRAM status bit corresponding to each data entry. The SMRAM status bit is set if the data entry holds data in SMRAM, and reset if the data entry does not hold data in SMRAM. The SMRAM status bit distinguishes SMRAM data from system memory data in the cache, thereby eliminating cache coherency problems.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: August 6, 1996
    Assignee: Digital Equipment Corporation
    Inventor: Robert C. Frame
  • Patent number: 5454111
    Abstract: A method and arrangement for preventing the locking out of devices which are coupled to a bus by either of two of the devices which have become initiator and target devices respectively. The devices arbitrate for control of the bus after the bus enters a bus free phase. The device which wins the arbitration becomes an initiator. A timer in each device on the bus is started upon the initiation of arbitration. The initiator device is removed from the bus when an elapsed time after the timers have been started reaches a predetermined value. The distributed clock of the invention ensures that the devices coupled to the bus will clear the bus after the initiator has been on the bus for a pre-determined time, thereby obviating skew problems associated with single clocked systems.
    Type: Grant
    Filed: December 21, 1993
    Date of Patent: September 26, 1995
    Assignee: Quantum Corp.
    Inventors: Robert C. Frame, Fernando A. Zayas
  • Patent number: 5349690
    Abstract: A method and apparatus for selecting a particular node from a plurality of nodes connected to a common bus to allow the node to use the bus. The nodes have a pre-determined priority. After initially enabling the nodes, the bus is monitored for a bus idle condition. It is then determined which of the nodes are enabled message nodes, which are enabled nodes that have a message to send on the bus. There is then arbitration between the enabled message nodes after the bus is in the bus idle condition for a first period of time, such that the enabled message node having the highest pre-determined priority among the enabled message nodes is disabled for arbitration purposes, and also at the same time selects a target and performs a transfer. This procedure is repeated until all the enabled message nodes have been disabled. Thereafter, all of the nodes on the bus are enabled when the bus is in the bus idle condition for a second period of time, which is longer than the first period of time.
    Type: Grant
    Filed: February 11, 1993
    Date of Patent: September 20, 1994
    Assignee: Digital Equipment Corporation
    Inventors: Robert C. Frame, Fernando A. Zayas, Edward A. Gardner
  • Patent number: 5301329
    Abstract: A method and arrangement for preventing the locking out of devices which are coupled to a bus by either of two of the devices which have become initiator and target devices respectively. The devices arbitrate for control of the bus after the bus enters a bus free phase. The device which wins the arbitration becomes an initiator. A timer in each device on the bus is started upon the initiation of the arbitration. The initiator device is removed from the bus when an elasped time after the timers have been started reaches a pre-determined value. The distributed clock of the invention ensures that the devices coupled to the bus will clear the bus after the initiator has been on the bus for a pre-determined time, thereby obviating skew problems associated with single clocked systems.
    Type: Grant
    Filed: July 9, 1990
    Date of Patent: April 5, 1994
    Assignee: Digital Equipment Corporation
    Inventors: Robert C. Frame, Fernando A. Zayas
  • Patent number: 5287463
    Abstract: An atomic ordered sequence of information phase transitions allows for the design of a pure hardware protocol controller for use in a small storage interconnect bus. The information phase transitions follow the sequence: Command Out phase, Data Out phase, and Status In phase. The only other transition sequence allowed is from the Command Out phase directly to the Status In phase. The Command Out phase is actually a header delivering header information. Included in the header are a REQ/ACK offset byte, source destination ID verify byte, frame length bytes, and a checksum byte. The Data Out phase contains any number of bytes that were defined in the Command Out frame length byte. The Status In phase is a single byte which is used to signal the outcome of the attempted data delivery.
    Type: Grant
    Filed: July 19, 1990
    Date of Patent: February 15, 1994
    Assignee: Digital Equipment Corporation
    Inventors: Robert C. Frame, Fernando A. Zayas
  • Patent number: 5182752
    Abstract: A bus interface between a data bus and data-storage devices provides error protection for multi-byte data packets received from the bus and intended for storage on an associated storage device by checking a packet for errors using check sum symbols and parity bits in the packet. The bus interface then (i) encodes a predetermined number of data symbols to generate error detection symbols, (ii) again checks the data symbols for errors using the parity bits, and (iii) stores the data and associated error detection symbols in one of the series of linked buffers. Each buffer holds enough to fill one storage unit, or sector. A storage interface later retrieves the buffered data and error detection symbols, combines them with the address of a designated storage sector, and encodes the symbols to generate error correction symbols. It then stores the encoded data, and error detection and correction symbols in the designated sector.
    Type: Grant
    Filed: June 29, 1990
    Date of Patent: January 26, 1993
    Assignee: Digital Equipment Corporation
    Inventors: John E. DeRoo, Robert C. Frame, Ann Solli