Patents by Inventor Robert C. Martin

Robert C. Martin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6787163
    Abstract: A nutritional supplement formulation for the enhancement of blood sugar regulation, prevention and treatment of insulin resistance, prevention and treatment of dysinulinemia, prevention and treatment of Syndrome X, and reduction of diabetic complications is disclosed. The formulation combines herbs, minerals and vitamins known to reduce insulin resistance with herbs, minerals and vitamins known to reduce blood sugar levels.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: September 7, 2004
    Inventors: Dennis H. Harris, Robert C. Martin
  • Publication number: 20040142045
    Abstract: A nutritional supplement formulation for the enhancement of blood sugar regulation, prevention and treatment of insulin resistance, prevention and treatment of dysinsulinemia, prevention and treatment of Syndrome X, and reduction of diabetic complications is disclosed. The formulation combines herbs, minerals and vitamins known to reduce insulin resistance with herbs, minerals and vitamins known to reduce blood sugar levels.
    Type: Application
    Filed: January 21, 2003
    Publication date: July 22, 2004
    Inventors: Dennis H. Harris, Robert C. Martin
  • Patent number: 6676055
    Abstract: A tape reel assembly including a hub, opposing upper and lower flanges, a plurality of reel teeth, and three engagement features. The opposing upper and lower flanges extend in a radial fashion from opposing sides of the hub. The reel teeth extend axially outwardly relative to the hub. The three engagement features are equidistantly spaced within the reel teeth and are configured to provide a dominant mating surface relative to surfaces of the plurality of reel teeth. With this configuration, the three engagement features mate with teeth of the tape drive clutch, and prevent meshed engagement with the remaining reel teeth. Thus, the three engagement features dictate the plane of contact between the tape reel assembly and the drive clutch, with the reel teeth serving as general guide surfaces that facilitate this interaction. The engagement features can be pronounced drive teeth or reduced-sized valleys.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: January 13, 2004
    Assignee: Imation Corp.
    Inventor: Robert C. Martin
  • Patent number: 6633454
    Abstract: A data storage device has a shock sense indicator disposed within its housing. The shock sense indicator may provide visible, audible, and/or machine-detectable indication of whether the data storage device has been subjected to a physical shock over some threshold. Machine detection of the shock state can be accomplished optically, mechanically, or electrically. A data storage drive has a detection switch that interfaces with a shock detector of a data storage device to ensure that no harmful operation is performed on a data storage device that has been subjected to a physical shock, thereby avoiding potential loss or corruption of data.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: October 14, 2003
    Assignee: Imation Corp.
    Inventors: Robert C. Martin, William J. Vanderheyden
  • Publication number: 20030013340
    Abstract: Microelectronic spring contacts with fiducial alignment marks for use on a semiconductor wafer contactor or similar apparatus, and methods for making such marks, are disclosed. Each alignment mark is placed on a pad adjacent to a contact tip. The alignment mark is positioned on the pad so that it will not contact the terminal or any other part of a wafer under test. The alignment mark and the contact tip are preferably positioned on the pad in the same lithographic step. Then, the pad and like pads, selected ones of which also have similar alignment marks, are attached to the ends of an array of resilient contact elements. A plurality of alignment marks in accurate registration with a plurality of contact tips on a contactor is thus disclosed. Configurations for ensuring that the alignment marks remain free of debris and easily located for essentially the entire life of the contactor are disclosed, as are various different exemplary shapes of alignment marks.
    Type: Application
    Filed: July 16, 2001
    Publication date: January 16, 2003
    Inventors: Robert C. Martin, Eric T. Watje
  • Publication number: 20020088770
    Abstract: Methods and systems for laser etching of optical servo patterns on magnetic data storage media using two or more beams of laser energy produced from a single source of laser energy to produce a servo pattern on the magnetic data storage media. By using two or more etching beams, the time required to produce a servo pattern on the magnetic data storage media can be significantly reduced. Alternatively, each servo track in the servo pattern can be written more than once. The servo patterns thus formed can be read optically or they may be read magnetically using magnetic overwriting (if the servo pattern is formed in a magnetic coating on the media). In either case, the servo patterns are either permanently formed in the media when read optically, or they can be recreated after bulk erasing if they are provided using magnetic overwriting. In yet another alternative, the servo patterns may be read both magnetically and optically, with the magnetic and optical reading occurring simultaneously or sequentially.
    Type: Application
    Filed: February 8, 2002
    Publication date: July 11, 2002
    Inventors: Lewis S. Damer, Stephen W. Farnsworth, Robert S. Jackson, Mark P. Lubratt, Robert C. Martin, David M. Perry, John J. Simbal, Daniel P. Stubbs
  • Patent number: 6365061
    Abstract: Methods and systems for laser etching of optical servo patterns on magnetic data storage media using two or more beams of laser energy produced from a single source of laser energy to produce a servo pattern on the magnetic data storage media. By using two or more etching beams, the time required to produce a servo pattern on the magnetic data storage media can be significantly reduced. Alternatively, each servo track in the servo pattern can be written more than once. The servo patterns thus formed can be read optically or they may be read magnetically using magnetic overwriting (if the servo pattern is formed in a magnetic coating on the media). In either case, the servo patterns are either permanently formed in the media when read optically, or they can be recreated after bulk erasing if they are provided using magnetic overwriting. In yet another alternative, the servo patterns may be read both magnetically and optically, with the magnetic and optical reading occurring simultaneously or sequentially.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: April 2, 2002
    Assignee: Imation Corp.
    Inventors: Lewis S. Damer, Stephen W. Farnsworth, Robert S. Jackson, Mark P. Lubratt, Robert C. Martin, David M. Perry, John J. Simbal, Daniel P. Stubbs
  • Patent number: 5997924
    Abstract: An automated self-service pizza process and system comprises a vending machine with self-contained cooking and processing equipment to rapidly prepare delicious pizza. The stand-alone unattended process and system visually displays pizzas with choices of different toppings for selection by a customer who can pay for the pizza by credit card, debit card, prepaid card, bank card, or by paper money or other cash. Pizza crust can be moved to an assembly area by a robot. In the assembly area, the selected toppings are automatically dispensed on the pizza crust. The pizza is then conveyed to an oven where it is cooked and discharged into a cardboard box or other suitable container. The type of pizza and customer's name can be printed on the box with an ink jet printer.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: December 7, 1999
    Assignee: LMO Consultants, Inc.
    Inventors: William T. Olander, Jr., Joseph W. Lucnik, Robert C. Martin
  • Patent number: 5868338
    Abstract: A single reel data tape cartridge housing includes a base and a cover. The base includes four outer side walls which are formed with at least one step such that the outer walls step to a decreased thickness toward their free end. The cover includes four outer side walls which are formed with at least one step such that the outer walls step to a decreased thickness toward their free end. The base and cover also include four inner walls which are formed with two steps such that the inner walls step to a decreased thickness toward their free end. The inner and outer walls of the cover complementarily mate with the inner and outer walls of the base. A projection can be placed within pockets in the base and cover to locate the base and cover during assembly.
    Type: Grant
    Filed: June 8, 1993
    Date of Patent: February 9, 1999
    Assignee: Imation Corp.
    Inventors: Robert C. Martin, G. Phillip Rambosek, William J. Vanderheyden, John W. Louks, Donald L. Pochardt, Satinder K. Nayar
  • Patent number: 5844954
    Abstract: A device and method for reducing phase jitter in digital phase locked loop applications resulting in smaller clock skews between application specific integrated circuits (ASICs). Phase jitter is reduced by a fine resolution digital delay line (20) comprising both coarse stages (variable delay element 24) for rough/fast phase adjustment and fine stages (fine resolution delay element 22) for precise delay adjustment when phase lock is near.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: December 1, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph A. Casasanta, Bernhard H. Andresen, Yoshinori Satoh, Stanley C. Keeney, Robert C. Martin
  • Patent number: 5612632
    Abstract: A flip-flop includes a data storage node for driving an inverter (62) and transfer gate (64) combination to transfer data stored on the data node (60) to a master storage node (66). A master cross-coupled latch (68) has two cross-coupled inverters (72) and (74) connected thereto such that the master storage node (66) is only connected to one side of the latch (68). The data node (66) directly drives a slave stage comprised of an inverter (76) and transfer gate (78) which in turn drives a slave storage node (80). The slave storage node (80) is connected to a slave cross-coupled latch (82) comprised of cross-coupled inverters (86) and (88). The slave storage node (80) comprises the Q-output of the inverter. The data is transferred to storage node (66) on the negative going edge of the clock signal and latched thereto on the positive going edge of the clock signal.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: March 18, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Shivaling Mahant-Shetti, Kevin Ovens, Clive Bittlestone, Robert C. Martin, Robert J. Landers
  • Patent number: 5599429
    Abstract: The water distillation system according to the invention recaptures and utilizes the inherent heat of transformation in converting from the vapor to the liquid states. The water distillation system efficiently removes volatile gases and impurities from the distillate and recaptures and reuses the heat from the impurities. A water seal is created to seal the drive shaft aperture of the compression housing and the rotating drive shaft of the compression rotor. In addition, the compression rotor is assembled of ultra-light, strong member in such a manner to significantly reduce the manufacturing and maintenance costs of the compression rotor drive mechanism.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: February 4, 1997
    Assignee: Martinstill Corporation
    Inventors: David L. Martin, Robert C. Martin
  • Patent number: 5544203
    Abstract: A device and method for reducing phase jitter in digital phase locked loop applications resulting in smaller clock skews between application specific integrated circuits (ASICs). Phase jitter is reduced by a fine resolution digital delay line (20) comprising both coarse stages (variable delay element 24) for rough/fast phase adjustment and fine stages (fine resolution delay element 22) for precise delay adjustment when phase lock is near.
    Type: Grant
    Filed: October 18, 1994
    Date of Patent: August 6, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph A. Casasanta, Bernhard H. Andresen, Yoshinori Satoh, Stanley C. Keeney, Robert C. Martin
  • Patent number: 5430398
    Abstract: A BiCMOS non-inverting buffer circuit (40) with small fan-in capacitance and excellent bipolar output drive. The circuit is ideal for buffering CMOS logic gates from excessive fan-out loads. The circuit also is less complex and more silicon efficient than present buffer circuit implementations, it provides improved transient saturation charge clamping and one buffer macro in an ASIC library can provide extended drive capability to all CMOS logic gates in the library.
    Type: Grant
    Filed: January 3, 1994
    Date of Patent: July 4, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Michael D. Cooper, Robert C. Martin, Stanley C. Keeney
  • Patent number: 5355037
    Abstract: A first periodic digital waveform is to be synchronized with a second periodic digital waveform obtained by propagating the first waveform through a delay path (13) having an adjustable propagation delay. In the disclosed approach, the delay of the delay path is increased, even when an edge (43) of the second waveform trails a corresponding edge (45) of the first waveform by less than one-half cycle. The delay continues to be increased until the edge of the second waveform is eventually time-shifted past the next successive corresponding edge (49) of the first waveform.
    Type: Grant
    Filed: June 15, 1992
    Date of Patent: October 11, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Bernhard H. Andresen, Joseph A. Casasanta, Stanley C. Keeney, Robert C. Martin, Yoshinori Satoh
  • Patent number: 5153457
    Abstract: An output buffer (12) is provided for producing an output signal varying between a voltage on a first lien (22) and a voltage on a second line (36). First output circuitry (3, 4) is provided for pulling an output terminal (26) to the voltage on first line (22). Second output circuitry (6, 7) is provided for pulling output terminal (26) to the voltage on second line (36) in response to an input thereto. First feedback circuitry (2, 8) is provided for detecting a voltage spike on first line (22) and varying the input to first output circuitry (3 4) in response. Second feedback circuitry (5, 9) is provided for detecting a voltage spike on second line (36) and varying the input to second output circuitry (6, 7) in response.
    Type: Grant
    Filed: December 12, 1990
    Date of Patent: October 6, 1992
    Assignee: Texas Instruments Incorporated
    Inventors: Robert C. Martin, Stanley C. Keeney
  • Patent number: 5027014
    Abstract: There is disclosed a circuit and method for converting on/off logic signals from one medium to on/off signals useful in a different medium. The circuit is particularly adapted to translate from negative voltage levels to positive voltage levels. The circuit includes voltage control levels for precisely controlling voltage as a function of temperature, all while only using positive voltage levels on the conversion circuit.
    Type: Grant
    Filed: March 30, 1990
    Date of Patent: June 25, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Alan S. Bass, Stephen R. Schenck, Robert C. Martin
  • Patent number: 5005173
    Abstract: An integrated circuit (10) includes at least one module (12) of operation circuits and also has other operation circuitry. The module (10) has a plurality of operation circuit terminals (98) each of which is operable to be selectively coupled to an external operation circuit terminal (86) or to a respective test terminal (96) by a multiplexer (76). A plurality of peripheral cells (30-40) are provided for connection to conductors external to the chip (10). Each cell (30-40) is bidirectionally coupled to a respective test terminal (42) and is undirectionally coupled to operation circuitry (134, 142, 158, 160) of the chip (10) such that test patterns of a testing program corresponding to the module (12) may be input into selected ones of the cells (30-40). Resulting output signals may be obtained from selected ones of the cells (30-40) that will be unaffected by operation circuitry on the integrated circuit chip exterior to the module (12).
    Type: Grant
    Filed: December 7, 1988
    Date of Patent: April 2, 1991
    Assignee: Texas Instruments Incorporated
    Inventor: Robert C. Martin
  • Patent number: 4704548
    Abstract: The specification discloses an input transistor (14) which is variable between high and low impedance states in response to input voltage transitions at terminal 10. An output transistor (16) is coupled to the input transistor (14) and is responsive to an input transition at terminal 10 for changing impedance states. Circuitry including a speed up transistor (44) is coupled between the input transistor (14) and output transistor (16) for applying added current to the output transistor (16) to speed the change of impedance state. The circuitry applies added current to output transistor (16) until the output voltage at terminal (18) falls below twice the base-emitter voltage of the output transistor (16).
    Type: Grant
    Filed: January 31, 1985
    Date of Patent: November 3, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Bobby D. Strong, Robert C. Martin, Kevin M. Ovens, James F. Salzman
  • Patent number: 4536664
    Abstract: A high speed, noninverting circuit for providing an interface between transistor-transistor logic gates and Schottky transistor logic gates. In one embodiment the output of a TTL circuit is coupled through a Schottky diode to an emitter-follower whose input is Schottky clamped. The output of the emitter-follower is coupled to a constant current sink and to the cathode of a low barrier Schottky diode, the anode of which forms the STL-compatible output of the interface circuit. The present circuit thus performs a noninverting level translation with minimum propagation delay.
    Type: Grant
    Filed: February 16, 1983
    Date of Patent: August 20, 1985
    Assignee: Texas Instruments Incorporated
    Inventor: Robert C. Martin