Patents by Inventor Robert C. McLaughlin

Robert C. McLaughlin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit to minimize local clock frequency disturbances when phase locking to a reference clock circuit
    Patent number: 4510462
    Abstract: A frequency disturbance minimization circuit for use in a phase locked loop circuit. A pulse generator eliminates random phase shift, which occurs after a reference clock outage, by synchronizing counted down derivatives of the local and reference clock circuits. A window circuit provides a signal representative of the difference in phase between these local and reference clock circuits. A counter accumulates these phase difference window signals for periodic interrogation by a microprocessor which causes a voltage controlled oscillator to adjust its frequency in the direction necessary to eliminate this phase difference.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: April 9, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Ivan L. Edwards, Robert C. McLaughlin, Max S. Macrander
  • Circuit to minimize local clock frequency disturbances when phase locking to a reference clock circuit
    Patent number: 4503400
    Abstract: A frequency disturbance minimization circuit for use in a phase locked loop circuit. A pulse generator eliminates random phase shift, which occurs after a reference clock outage, by synchronizing counted down derivatives of the local and reference clock circuits. A window circuit provides a signal representative of the difference in phase between these local and reference clock circuits. A counter accumulates these phase difference window signals for periodic interrogation by a microprocessor which causes a voltage controlled oscillator to adjust its frequency in the direction necessary to eliminate this phase difference.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: March 5, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Ivan L. Edwards, Robert C. McLaughlin, Max S. Macrander
  • Circuit to minimize local clock frequency disturbances when phase locking to a reference clock circuit
    Patent number: 4498059
    Abstract: A frequency disturbance minimization circuit for use in a phase locked loop circuit. A pulse generator eliminates random phase shift, which occurs after a reference clock outage, by synchronizing counted down derivatives of the local and reference clock circuits. A window circuit provides a signal representative of the difference in phase between these local and reference clock circuits. A counter accumulates these phase difference window signals for periodic interrogation by a microprocessor which causes a voltage controlled oscillator to adjust its frequency in the direction necessary to eliminate this phase difference.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: February 5, 1985
    Assignee: GTE Automatic Electric Incorporated
    Inventors: Ivan L. Edwards, Robert C. McLaughlin, Max S. Macrander