Abstract: A slat board hanger is used with a slat board having a L-shaped receiving groove and an elongate post for displaying articles. The slat board hanger comprises a hanger member including a first portion, a second portion and an intermediate portion. Each of the first and second portions of the hanger member defines a first tongue and a second tongue, respectively. The intermediate portion of the hanger member defines a supporting means. The first and second tongues of the hanger member are spaced apart to provide an opening to permit the supporting means of the hanger member to releasing grip in use the elongate post. The supporting means comprises a semicircle portion having two sidewalls leading from the semicircle portion thereby defining the opening formed by the spaced apart first and second tongues of the hanger member to permit the semicircle portion in use to grippingly receive and support the elongate post.

Abstract: An article display is described for displaying a plurality of articles comprising a base with supporting posts attached to the base. The supporting posts releasably support horizontal members which support a bridging member(s). Each horizontal member includes a grasping means for releasingly gripping the respective supporting post enabling the horizontal members to be vertically positioned along the vertical length of the respective supporting post. A bridging member interconnects the horizontal members positioned at adjacent supporting posts thereby providing a continuous display for the plurality of articles to be displayed spanning from one supporting post to an adjacent supporting post and enabling the removal the bridging member or one of the horizontal members as determined by the removal of displayed articles from the plurality of articles displayed thereon thereby maintaining the article display filled with displayed articles. A particular article display tray is also disclosed.

Abstract: Apparatus for assembling binary data bits in parallel by groups in variable, selected locations in a shift register for subsequent serial readout. One or more shift registers are arranged in a matrix of rows and columns of storage cells and addressed along one coordinate while a plurality of data are applied in parallel along the orthogonal. Selector circuits are controlled to selectively shift a data word to enable the first bit in the word to be stored in any storage position within the addressed coordinate, with each remaining bit in the word stored in a correspondingly contiguous storage position in the matrix. Bit storage cells of the shift registers are of the set-reset latch type so that once set they cannot be changed by subsequent data bits until the entire array is reset. This enables the overwriting of successive data bytes.