Abstract: An electrical pacer device which responds to cardiac demand so as to alter the cardiac output in a fashion to satisfy that demand. Changes in the fundamental period of the atrial electrical cycle are detected and averaged over a predetermined time interval and the resulting control signal is used to raise and lower the ventricular heart rate to increase and decrease the aforesaid cardiac output. At the same time, means are provided for continuously driving the ventricular rate toward a predetermined lower rate (the at rest rate) on a time cycle which is significantly longer than the above-mentioned predetermined time interval.

Abstract: A logic system is disclosed for using a memory device of the serial read type having redundant elements in excess of the nominal memory size and consists of a Programmable Read Only Memory having a defect map programmed into it with respect to the associated memory device, a shift register of a predetermined length equivalent to the maximum number of allowable defects, a multiplexer associated with the shift register, a position counter for controlling the multiplexer and, finally, appropriate logic to control the system. This system is disclosed in connection with a bubble memory system of the field access major loop -- minor loop type having extra minor loops. As defects are encountered in writing, data is shifted through the shift register while the multiplexer is incremented to the proper output position of the shift register based on the number of encountered defects. As data is read, an analogous reverse to writing operation is performed with the multiplexer being decremented.