Patents by Inventor Robert C. Sibert

Robert C. Sibert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Establishing benchmarks for analyzing benefits associated with voltage scaling, analyzing the benefits and an apparatus therefor
    Patent number: 8122422
    Abstract: Methods for establishing benchmarks and for analyzing benefits associated with voltage scaling are provided. In one embodiment, the method for establishing benchmarks includes: (1) synthesizing a netlist from a RTL of a functional IC design; (2) implementing a layout of an IC from the netlist, wherein the synthesizing and the implementing are performed at designated voltages and frequencies over a voltage and a frequency range, the voltage range including a voltage scaling range and a voltage associated with a designated implementation of the IC; (3) obtaining measurements of at least one voltage scaling metric associated with the IC at each of the designated voltages and frequencies; and (4) normalizing measurements associated with the voltage scaling range to measurements associated with the designated implementation employing a processor to obtain normalized benchmarks for analyzing optimization of the IC associated with voltage scaling. EDA tools may be used for synthesizing, implementing and obtaining.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: February 21, 2012
    Assignee: LSI Corporation
    Inventors: Vishwas M. Rao, James C. Parker, Stephen A. Masnica, Robert C. Sibert
  • ESTABLISHING BENCHMARKS FOR ANALYZING BENEFITS ASSOCIATED WITH VOLTAGE SCALING, ANALYZING THE BENEFITS AND AN APPARATUS THEREFOR
    Publication number: 20110023004
    Abstract: Methods for establishing benchmarks and for analyzing benefits associated with voltage scaling are provided. In one embodiment, the method for establishing benchmarks includes: (1) synthesizing a netlist from a RTL of a functional IC design; (2) implementing a layout of an IC from the netlist, wherein the synthesizing and the implementing are performed at designated voltages and frequencies over a voltage and a frequency range, the voltage range including a voltage scaling range and a voltage associated with a designated implementation of the IC; (3) obtaining measurements of at least one voltage scaling metric associated with the IC at each of the designated voltages and frequencies; and (4) normalizing measurements associated with the voltage scaling range to measurements associated with the designated implementation employing a processor to obtain normalized benchmarks for analyzing optimization of the IC associated with voltage scaling. EDA tools may be used for synthesizing, implementing and obtaining.
    Type: Application
    Filed: July 27, 2009
    Publication date: January 27, 2011
    Applicant: LSI Corporation
    Inventors: Vishwas M. Rao, James C. Parker, Stephen A. Masnica, Robert C. Sibert