Patents by Inventor Robert Cavin
Robert Cavin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11112865Abstract: The disclosed eye-tracking systems may include a visible light display having visible light pixels, at least one infrared pixel positioned within bounds of the visible light display, and an infrared sensor positioned and configured to detect infrared light originating from the at least one infrared pixel and reflected from an eye of the user. Related head-mounted display systems and methods for eye tracking are also disclosed.Type: GrantFiled: February 13, 2019Date of Patent: September 7, 2021Assignee: Facebook Technologies, LLCInventors: Alexander Jobe Fix, Andrew Wyman MacDonald, Dmitri Model, Mohammadhossein Daraeihajitooei, Javier San Agustin Lopez, Kirk Erik Burgess, Mohamed Hegazy, Scott Robert Ramsby, Sebastian Sztuk, Robert Cavin
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Patent number: 10042814Abstract: A device, system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed.Type: GrantFiled: November 14, 2014Date of Patent: August 7, 2018Assignee: Intel CorporationInventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Andrew T. Forsyth, Michael Abrash
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Publication number: 20150074354Abstract: A device, system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed.Type: ApplicationFiled: November 14, 2014Publication date: March 12, 2015Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Andrew T. Forsyth, Michael Abrash
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Patent number: 8892848Abstract: A device, system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed.Type: GrantFiled: July 5, 2011Date of Patent: November 18, 2014Assignee: Intel CorporationInventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Tom Forsyth, Michael Abrash
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Patent number: 8838663Abstract: A new function for calculating the reciprocal residual of a floating-point number X is defined as recip_residual(X)=1?X*recip(X), where recip(X) represents the reciprocal of X. The function may be implemented using a fused multiply-add unit in a processor. The reciprocal value of X, recip(X), may be obtained from a lookup table. The recip_residual function may help reduce the latency of many multiplicative functions that are based on products of multiple numbers and can be expressed in simple terms of functions on each individual number (e.g., log(U*V)=log(U)+log(V)).Type: GrantFiled: March 30, 2007Date of Patent: September 16, 2014Assignee: Intel CorporationInventors: Ping Tak Peter Tang, Robert Cavin
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Publication number: 20140129802Abstract: A computer processor includes control logic for executing LoadUnpack and PackStore instructions. In one embodiment, the processor includes a vector register and a mask register. In response to a PackStore instruction with an argument specifying a memory location, a circuit in the processor copies unmasked vector elements from the vector register to consecutive memory locations, starting at the specified memory location, without copying masked vector elements. In response to a LoadUnpack instruction, the circuit copies data items from consecutive memory locations, starting at an identified memory location, into unmasked vector elements of the vector register, without copying data to masked vector elements. Other embodiments are described and claimed.Type: ApplicationFiled: January 10, 2014Publication date: May 8, 2014Inventor: Robert CAVIN
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Patent number: 8681173Abstract: A system and method for generating a single compressed vector including two or more predetermined attribute values. For each of a plurality of data points such as pixels, if a first and a second attribute values of the data point are equal to a first and a second, respectively, of the two or more predetermined attribute values, the compressed vector is used to operate on the data point. Other embodiments are described and claimed.Type: GrantFiled: December 31, 2007Date of Patent: March 25, 2014Assignee: Intel CorporationInventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Tom Forsyth, Michael Abrash
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Patent number: 8108614Abstract: A method and apparatus for efficiently caching streaming and non-streaming data is described herein. Software, such as a compiler, identifies last use streaming instructions/operations that are the last instruction/operation to access streaming data for a number of instructions or an amount of time. As a result of performing an access to a cache line for a last use instruction/operation, the cache line is updated to a streaming data no longer needed (SDN) state. When control logic is to determine a cache line to be replaced, a modified Least Recently Used (LRU) algorithm is biased to select SDN state lines first to replace no longer needed streaming data.Type: GrantFiled: December 31, 2007Date of Patent: January 31, 2012Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin
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Patent number: 8065488Abstract: A method and apparatus for efficiently caching streaming and non-streaming data is described herein. Software, such as a compiler, identifies last use streaming instructions/operations that are the last instruction/operation to access streaming data for a number of instructions or an amount of time. As a result of performing an access to a cache line for a last use instruction/operation, the cache line is updated to a streaming data no longer needed (SDN) state. When control logic is to determine a cache line to be replaced, a modified Least Recently Used (LRU) algorithm is biased to select SDN state lines first to replace no longer needed streaming data.Type: GrantFiled: October 20, 2010Date of Patent: November 22, 2011Assignee: Intel CorporationInventors: Eric Sprangle, Anwar Rohillah, Robert Cavin
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Publication number: 20110264863Abstract: A device, system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed.Type: ApplicationFiled: July 5, 2011Publication date: October 27, 2011Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Tom Forsyth, Michael Abrash
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Patent number: 7984273Abstract: A system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed.Type: GrantFiled: December 31, 2007Date of Patent: July 19, 2011Assignees: Intel CorporationInventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Tom Forsyth, Michael Abrash
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Publication number: 20110099333Abstract: A method and apparatus for efficiently caching streaming and non-streaming data is described herein. Software, such as a compiler, identifies last use streaming instructions/operations that are the last instruction/operation to access streaming data for a number of instructions or an amount of time. As a result of performing an access to a cache line for a last use instruction/operation, the cache line is updated to a streaming data no longer needed (SDN) state. When control logic is to determine a cache line to be replaced, a modified Least Recently Used (LRU) algorithm is biased to select SDN state lines first to replace no longer needed streaming data.Type: ApplicationFiled: October 20, 2010Publication date: April 28, 2011Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin
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Publication number: 20090172364Abstract: A system and method for assigning values to elements in a first register, where each data field in a first register corresponds to a data element to be written into a second register, and where for each data field in the first register, a first value may indicate that the corresponding data element has not been written into the second register and a second value indicates that the corresponding data element has been written into the second register, reading the values of each of the data fields in the first register, and for each data field in the first register having the first value, gathering the corresponding data element and writing the corresponding data element into the second register, and changing the value of the data field in the first register from the first value to the second value. Other embodiments are described and claimed.Type: ApplicationFiled: December 31, 2007Publication date: July 2, 2009Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Tom Forsyth, Michael Abrash
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Publication number: 20090171994Abstract: A system and method for generating a single compressed vector including two or more predetermined attribute values. For each of a plurality of data points such as pixels, if a first and a second attribute values of the data point are equal to a first and a second, respectively, of the two or more predetermined attribute values, the compressed vector is used to operate on the data point. Other embodiments are described and claimed.Type: ApplicationFiled: December 31, 2007Publication date: July 2, 2009Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin, Tom Forsyth, Michael Abrash
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Publication number: 20090172348Abstract: A computer processor includes control logic for executing LoadUnpack and PackStore instructions. In one embodiment, the processor includes a vector register and a mask register. In response to a PackStore instruction with an argument specifying a memory location, a circuit in the processor copies unmasked vector elements from the vector register to consecutive memory locations, starting at the specified memory location, without copying masked vector elements. In response to a LoadUnpack instruction, the circuit copies data items from consecutive memory locations, starting at an identified memory location, into unmasked vector elements of the vector register, without copying data to masked vector elements. Other embodiments are described and claimed.Type: ApplicationFiled: December 26, 2007Publication date: July 2, 2009Inventor: Robert Cavin
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Publication number: 20090172291Abstract: A method and apparatus for efficiently caching streaming and non-streaming data is described herein. Software, such as a compiler, identifies last use streaming instructions/operations that are the last instruction/operation to access streaming data for a number of instructions or an amount of time. As a result of performing an access to a cache line for a last use instruction/operation, the cache line is updated to a streaming data no longer needed (SDN) state. When control logic is to determine a cache line to be replaced, a modified Least Recently Used (LRU) algorithm is biased to select SDN state lines first to replace no longer needed streaming data.Type: ApplicationFiled: December 31, 2007Publication date: July 2, 2009Inventors: Eric Sprangle, Anwar Rohillah, Robert Cavin
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Publication number: 20080243985Abstract: A new function for calculating the reciprocal residual of a floating-point number X is defined as recip_residual(X)=1?X*recip(X), where recip(X) represents the reciprocal of X. The function may be implemented using a fused multiply-add unit in a processor. The reciprocal value of X, recip(X), may be obtained from a lookup table. The recip_residual function may help reduce the latency of many multiplicative functions that are based on products of multiple numbers and can be expressed in simple terms of functions on each individual number (e.g., log(U*V)=log(U)+log(V)).Type: ApplicationFiled: March 30, 2007Publication date: October 2, 2008Inventors: Ping Tak Peter Tang, Robert Cavin