Patents by Inventor Robert Corley

Robert Corley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200300683
    Abstract: An opaque cup has an inside measuring system having at least first and second scales viewable inside the cup. The first scale is preferably located in a bottom half of the volume of the cup and the second scale is located in a top half of the volume of the cup. Some cups may just have the first or second scale, some may have both, whether they be linearly aligned, or disposed angularly relative to one another, such as 180 degrees from one another.
    Type: Application
    Filed: June 10, 2020
    Publication date: September 24, 2020
    Inventors: Robert Corley, Elmer William Stout, JR.
  • Patent number: 8780168
    Abstract: DMA transfer of audio and video data. The audio and video data may be received over a serial bus. A DMA engine may provide audio and video data packets to data storage logic based on the audio and video data. The DMA engine may provide each of the audio data packets with a first, same destination address of a first memory and may provide each of the video data packets with a second, same destination address of the first memory. The data storage logic may maintain first and second pointers that indicate a next current memory location for audio data in a first buffer and video data in a second buffer in the first memory, respectively. The data storage logic may receive and store the audio and video data packets at respective locations in the first and second buffers based on current values of the first and second pointers.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: July 15, 2014
    Assignee: Logitech Europe S.A.
    Inventors: Robert A. Corley, Patrick R. McKinnon, Stefan F. Slivinski
  • Publication number: 20130155179
    Abstract: DMA transfer of audio and video data. The audio and video data may be received over a serial bus. A DMA engine may provide audio and video data packets to data storage logic based on the audio and video data. The DMA engine may provide each of the audio data packets with a first, same destination address of a first memory and may provide each of the video data packets with a second, same destination address of the first memory. The data storage logic may maintain first and second pointers that indicate a next current memory location for audio data in a first buffer and video data in a second buffer in the first memory, respectively. The data storage logic may receive and store the audio and video data packets at respective locations in the first and second buffers based on current values of the first and second pointers.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Inventors: Robert A. Corley, Patrick R. McKinnon, Stefan F. Slivinski
  • Patent number: 7590056
    Abstract: A processor includes controller circuitry configurable to determine for a given packet or other protocol data unit (PDU) received by the processor whether the given PDU is a single-cell PDU. If the given PDU is a single-cell PDU, information characterizing the given PDU is stored in first memory circuitry internal to the processor, without utilizing a linked list data structure. If the given PDU is not a single-cell PDU, information characterizing the PDU is stored in second memory circuitry external to the processor, utilizing a linked list data structure. The processor may be configured as a network processor integrated circuit to provide an interface between a network and a switch fabric in a router or switch.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: September 15, 2009
    Assignee: Agere Systems Inc.
    Inventors: Robert A. Corley, Robert H. Utley
  • Patent number: 7489640
    Abstract: A processor includes controller circuitry operative to control the performance of a continuity check for each of a plurality of flows of protocol data units (PDUs) received by the processor. The controller circuitry is further operative to control access to a set of continuity check counters comprising a counter for each of the plurality of flows. The processor stores an identifier for each of a subset of the plurality of flows in a continuity check cache, and determines if a given flow for which a PDU is received in the processor has a corresponding entry in the continuity check cache. If the given flow has such an entry, the processor prevents a corresponding one of the continuity check counters from being updated, and if the given flow does not have such an entry, the processor clears the corresponding one of the continuity check counters and stores a flow identifier for the given flow in the continuity check cache.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: February 10, 2009
    Assignee: Agere Systems Inc.
    Inventor: Robert A. Corley
  • Publication number: 20070255676
    Abstract: Improved techniques for performing tree-based processing associated with a network processor or other type of processor are disclosed. By way of example, a method of performing a traversal of a tree structure includes the following steps. A first portion of data of a tree structure to be traversed is stored in a first memory level. A second portion of data of the tree structure to be traversed is stored in a second memory level. At least a third portion of data of the tree structure to be traversed is stored in at least a third memory level. In response to receipt of an input search object, a processor traverses one or more of the portions of the tree structure respectively stored in the memory levels to determine one or more matches between the tree data stored in the memory levels and the input search object. The processor, the first memory level, and the second memory level are implemented on one integrated circuit, and the third memory level is implemented external to the integrated circuit.
    Type: Application
    Filed: April 27, 2006
    Publication date: November 1, 2007
    Inventors: David Brown, Robert Corley, David Sonnier
  • Patent number: 7277396
    Abstract: A processor includes controller circuitry operative to control performance monitoring for at least one flow of cells or other protocol data units received by the processor. The controller circuitry includes a classifier and is operative to access memory circuitry associated with the processor. The classifier is configured to perform at least a first pass classification of at least a subset of the protocol data units. The controller circuitry in conjunction with a first pass classification of a protocol data unit of a first type is operative to execute a first script, and in conjunction with a first pass classification of a protocol data unit of a second type is operative to execute a second script different than the first script. A result of execution of at least one of the first and second scripts is stored in the memory circuitry.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: October 2, 2007
    Assignee: Agere Systems Inc.
    Inventors: David Allen Brown, Robert A. Corley, Asif Q. Khan
  • Publication number: 20070012601
    Abstract: Embodiments of systems, methods and apparatuses for an output generator for generating output from processed content of a structured document are disclosed. More specifically, embodiments of an output generator may comprise hardware circuitry operable to order data resulting from the transformation of a structured document as it is generated and format this data according to a format of a corresponding output document to generate output corresponding to the output document.
    Type: Application
    Filed: April 27, 2006
    Publication date: January 18, 2007
    Inventors: Howard Tsoi, Daniel Cermak, Richard Trujillo, Trenton Grale, Robert Corley, Bryan Dobbs, Russell Davoli
  • Publication number: 20060215636
    Abstract: A method of providing communication service, includes receiving user identification information and first communication service criteria. The user identification information identifies a user, while the first communication service criteria describe a first communication service requested by the user. The method also includes generating a first communication service order based on the first communication service criteria. The first communication service order includes the user identification information and the communication service criteria; The method further includes selecting premise equipment for the user and generating an equipment order, wherein the equipment order includes the user identification information and identifies the selected premise equipment. Additionally, the method includes transmitting the first communication service order to a first service provider and transmitting the equipment order to an equipment provider.
    Type: Application
    Filed: March 28, 2005
    Publication date: September 28, 2006
    Inventors: Robert Corley, Richard Platt, Louis Fausak, Andrew Fullford
  • Publication number: 20060215557
    Abstract: A method of providing communication service, includes receiving user identification information and first communication service criteria. The user identification information identifies a user, while the first communication service criteria describe a first communication service requested by the user. The method also includes generating a first communication service order based on the first communication service criteria. The first communication service order includes the user identification information and the communication service criteria; The method further includes selecting premise equipment for the user and generating an equipment order, wherein the equipment order includes the user identification information and identifies the selected premise equipment. Additionally, the method includes transmitting the first communication service order to a first service provider and transmitting the equipment order to an equipment provider.
    Type: Application
    Filed: July 11, 2005
    Publication date: September 28, 2006
    Inventors: Robert Corley, Richard Platt, Louis Fausak, Andrew Fullford
  • Publication number: 20060218632
    Abstract: A method for initiating communication service includes coupling a communication device to a network, the communication device storing a trusted address that is associated with a trust server and requesting, with the communication device, a portal address from the trust server located at the trusted address. The method also includes authenticating the communication device at the trust server and transmitting from the trust server to the communication device the portal address in response to the trust server authenticating the communication device. Furthermore, the method includes requesting, with the communication device, a proxy address from a portal located at the portal address and receiving, at the communication device, a proxy address from the portal. The method also includes initiating communication on a network coupled to the portal using the communication device.
    Type: Application
    Filed: March 28, 2005
    Publication date: September 28, 2006
    Inventors: Robert Corley, Richard Platt, Louis Fausak, Andrew Fullford
  • Publication number: 20050094565
    Abstract: A processor includes controller circuitry operative to control performance monitoring for at least one flow of cells or other protocol data units (PDUs) received by the processor. The controller circuitry includes a classifier and is operative to access memory circuitry associated with the processor. The classifier is configured to perform at least a first pass classification of at least a subset of the PDUs. The controller circuitry in conjunction with a first pass classification of a PDU of a first type is operative to execute a first script, and in conjunction with a first pass classification of a PDU of a second type is operative to execute a second script different than the first script. A result of execution of at least one of the first and second scripts is stored in the memory circuitry. A performance monitoring output is generated, responsive to receipt of the protocol data unit of the second type, based at least in part on the result of execution of at least one of the first and second scripts.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 5, 2005
    Inventors: David Allen Brown, Robert Corley, Asif Khan
  • Publication number: 20050086392
    Abstract: A processor includes controller circuitry operative to control the performance of a continuity check for each of a plurality of flows of protocol data units (PDUs) received by the processor. The controller circuitry is further operative to control access to a set of continuity check counters comprising a counter for each of the plurality of flows. The processor stores an identifier for each of a subset of the plurality of flows in a continuity check cache, and determines if a given flow for which a PDU is received in the processor has a corresponding entry in the continuity check cache. If the given flow has such an entry, the processor prevents a corresponding one of the continuity check counters from being updated, and if the given flow does not have such an entry, the processor clears the corresponding one of the continuity check counters and stores a flow identifier for the given flow in the continuity check cache.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 21, 2005
    Inventor: Robert Corley
  • Publication number: 20050025154
    Abstract: A processor includes controller circuitry configurable to determine for a given packet or other protocol data unit (PDU) received by the processor whether the given PDU is a single-cell PDU. If the given PDU is a single-cell PDU, information characterizing the given PDU is stored in first memory circuitry internal to the processor, without utilizing a linked list data structure. If the given PDU is not a single-cell PDU, information characterizing the PDU is stored in second memory circuitry external to the processor, utilizing a linked list data structure. The processor may be configured as a network processor integrated circuit to provide an interface between a network and a switch fabric in a router or switch.
    Type: Application
    Filed: July 30, 2003
    Publication date: February 3, 2005
    Inventors: Robert Corley, Robert Utley