Abstract: The invention is an improved bank select read only memory in which the bit lines and virtual ground lines are precharged to ground instead of being precharged to an internal low supply voltage. Both of the two virtual ground lines are selected for the selected bit and both selected virtual ground lines are driven to ground during the precharge phase. At the top of the memory array, all virtual ground lines in the memory array are precharged to ground during the precharge phase. Next, during the sensing phase, the operation of the two virtual ground lines for the selected bit is changed to selectively hold one virtual ground line at ground and switch the second virtual ground line to a positive voltage. All bit lines are precharged to ground during the precharge phase. In the following sensing phase, the selected bit line is driven positive by the selected memory core FET if it is programmed with a low threshold voltage.

Abstract: A circuit which differentially amplifies voltages that are close to ground with differences of about 0.15 volts uses voltage level shifters, a cross coupled current source and inverters to provide increased speed, accuracy, and gain. Symmetric cross coupled current sources are used in a differential amplifier to provide the differential amplifier with a balanced load. A symmetric and balanced layout senses smaller voltage differences and operates faster than would otherwise be possible. The gain of the cross coupled current source is controlled by four FETs. Voltage level shifters at the input to the differential amplifier allow the differential amplifier to sense signals that are close to ground with a voltage difference of about 0.15 volts. The voltage level shifters also shift the signals to a voltage that increases the gain of the differential amplifier. Two inverters block half level signals from being outputted until the sense amplifier data has been latched.

Abstract: The invention is an improved bank select read only memory in which the bit lines and virtual ground lines are all precharged to ground instead of being precharged to an internal low supply voltage. Both of the two virtual ground lines are selected for the selected bit and both selected virtual ground lines are driven to ground during the precharge phase. At the top of the memory array, all virtual ground lines in the memory array are precharged to ground during the precharge phase.Next during the sensing phase, the operation of the two virtual ground lines for the selected bit is changed to selectively hold one virtual ground line at ground and switch the second virtual ground line to a positive voltage. All bit lines are precharged to ground during the precharge phase.In the following sensing phase, the selected bit line is driven positive by the selected memory core FET if it is programmed with a low threshold voltage.