Patents by Inventor Robert D. Baran

Robert D. Baran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • IGBT with channel resistors
    Patent number: 6798019
    Abstract: An IGBT has striped cell with source stripes 2a, 2b continuous or segmented along the length of the base stripe 3. The opposite stripes are periodically connected together by the N+ contact regions 20 to provide channel resistance along the width of the source stripes 2a, 2b. For continuous stripes the resistance between two sequential contact areas 20a, 20b is greatest in the middle and current concentrates near the source contact regions 20. The wider the spacing between the contacts 20, the larger the resistive drop to the midpoint between two N+ contacts 20.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: September 28, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Dwayne S. Reichl, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • Thick buffer region design to improve IGBT self-clamped inductive switching (SCIS) energy density and device manufacturability
    Patent number: 6777747
    Abstract: An IGBT has a thick buffer region with increased doping to improve self-clamped inductive switching and device manufacture. A planar or trench gate IGBT has a buffer layer more than 25 microns thick. The buffer layer is doped high enough so that its carriers are more numerous than minority carriers, particularly at the transition between the N buffer & N drift region.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: August 17, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Joseph A. Yedinak, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • Thick buffer region design to improve IGBT self-clamped inductive switching (SCIS) energy density and device manufacturability
    Publication number: 20030136974
    Abstract: An IGBT has a thick buffer region with increased doping to improve self-clamped inductive switching and device manufacture. A planar or trench gate IGBT has a buffer layer more than 25 microns thick. The buffer layer is doped high enough so that its carriers are more numerous than minority carriers, particularly at the transition between the N buffer & N drift region.
    Type: Application
    Filed: January 18, 2002
    Publication date: July 24, 2003
    Inventors: Joseph A. Yedinak, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange
  • IGBT with channel resistors
    Publication number: 20030137015
    Abstract: An IGBT has striped cell with source stripes 2a, 2b continuous or segmented along the length of the base stripe 3. The opposite stripes are periodically connected together by the N+ contact regions 20 to provide channel resistance along the width of the source stripes 2a, 2b. For continuous stripes the resistance between two sequential contact areas 20a, 20b is greatest in the middle and current concentrates near the source contact regions 20. The wider the spacing between the contacts 20, the larger the resistive drop to the midpoint between two N+ contacts 20.
    Type: Application
    Filed: January 23, 2002
    Publication date: July 24, 2003
    Inventors: Joseph A. Yedinak, Dwayne S. Reichl, Jack E. Wojslawowicz, Bernard J. Czeck, Robert D. Baran, Douglas Lange