Abstract: The present invention provides a thin film resistor and method of manufacture therefor. The thin film resistor comprises a resistive layer located on a first dielectric layer, first and second contact pads located on the resistive layer, and a second dielectric layer located over the resistive layer and the first and second contact pads. In an illustrative embodiment, the thin film resistor further includes a first interconnect that contacts the first contact pad and a second interconnect that contacts the second contact pad.

Abstract: The present invention provides a thin film resistor and method of manufacture therefor. The thin film resistor comprises a resistive layer located on a first dielectric layer, first and second contact pads located on the resistive layer, and a second dielectric layer located over the resistive layer and the first and second contact pads. In an illustrative embodiment, the thin film resistor further includes a first interconnect that contacts the first contact pad and a second interconnect that contacts the second contact pad.

Abstract: An integrated circuit is made by a technique that provides a planar dielectric over gate, source, and drain regions without over-etching of the gate contact region, In the inventive process, the contact windows are etched in the conformal dielectric prior to the planarization step, so that the etch thickness is the same for the gate as for the source/drain windows. Then, a sacrificial planarizing polymer (e.g., a photoresist) is deposited to cover the conformal dielectric and fill the etched windows. Finally, a planarizing etch-back is performed, and the polymer is removed from the contact windows. A planarized dielectric is achieved without excessive etching of the gate windows.

Abstract: A metallization scheme useful for integrated circuits uses a buffer layer to ensure that the etch back of a contact metal, such as tungsten, deposited over the buffer layer, can be controlled to form a complete tungsten plug in a via while the tungsten on the dielectric is completely removed. The buffer layer, once exposed, reacts with the plasma etch to form non-volatile compounds which decrease the free surface mobility of the etching species. This active species depletion thus decreases the etch rate of the tungsten within the vias. Continued exposure of unreacted buffer material is ensured by performing a sputter cleaning simultaneously with the plasma etch.

Abstract: A method of fabricating a thin film semiconductor hybrid circuit is disclosed. After processing of the integrated circuit in the semiconductor wafer up to the point of establishing ohmic contacts (14) to devices (13), a thin film RC circuit is fabricated on an insulating layer (11,12) overlying the wafer. This is accomplished by first forming the capacitor anodes (15') on the insulator by depositing and etching a layer such as alpha tantalum. Resistors (16) are then formed by depositing and etching a layer such as tantalum nitride. Portions of the capacitor anodes are then anodized using an appropriate mask (17) to form the capacitor dielectric. Capacitor counterelectrodes (20') and interconnect conductors (20'") are formed by depositing and etching successive layers of metal such as nickel-chromium and gold. After all thin film components are formed, the resistors and capacitors are stabilized by heating the circuit in an atmosphere comprising high pressure steam.