Abstract: The invention provides a method and apparatus for the analysis of rocks and rock fragments. A method for the analysis of a rock fragment including: feeding the rock fragment to a microwave irradiation zone of microwave energy generated by a microwave source; gauging energy absorbed by the rock fragment; and correlating rate of change of the gauged energy absorbed by the rock fragment with compositional characteristics of the rock fragment.

Abstract: Circuits and methods are provided for clock adjustment. A method for clock adjustment includes receiving feedback clocks from independent ASIC modules. The method includes comparing the feedback clocks to a reference clock to generate phase measurement values. A common delay is removed from the phase measurement values to form normalized correction values. Target phase values and clock select values are selected using the normalized correction values. And, clock signals to independent ASIC modules are adjusted based on the target phase values and clock select values.

Abstract: A method for scaling an image includes determining a plurality of lineweight values for a plurality of virtual scan lines. In addition, the method includes determining a normalization value using the plurality of lineweight values. The method further includes determining a pulse code value for a pixel in an actual scan line using the plurality of lineweight values, the normalization value, and pulse code values for pixels in the plurality of virtual scan lines.

Abstract: A method of clocking a video processing circuit is performed by stalling a reference clock signal. The reference clock signal is stalled based on a stall signal from a clock-independent pulse width modulator. The stalled reference clock signal is used to produce a video clock signal for use by an image data processing circuit.

Abstract: Circuits and methods are provided for clock adjustment. A method for clock adjustment includes receiving feedback clocks from independent ASIC modules. The method includes comparing the feedback clocks to a reference clock to generate phase measurement values. A common delay is removed from the phase measurement values to form normalized correction values. Target phase values and clock select values are selected using the normalized correction values. And, clock signals to independent ASIC modules are adjusted based on the target phase values and clock select values.

Abstract: Print data is resolved into pixels that each include a corresponding placement parameter. A nonlinear transfer function is applied to a width parameter for each pixel, and data is generated based on transformed width parameters and the corresponding placement parameters.

Abstract: A method of clocking a video processing circuit by stalling a reference clock signal based on a stall signal from a clock-independent pulse width modulator to produce a video clock signal for use by an image data processing circuit.

Abstract: The present invention provides both differential and integral non-linearity measurement capabilities with a minimum of additional hardware and a test time reduction of several orders of magnitude. The test circuit for N delay lines includes a ring oscillator that has a select signal and an output. A counter is connected in parallel with the ring oscillator. An arithmetic logic unit receives a “COMPARE” value from a register and the counter output. An upper and a lower bound register store acceptable tolerances for non-linearity. Each comparator, upper and lower bound, receives the tolerance stored in the corresponding register and the output of the arithmetic logic unit. An AND gate receives the outputs of the upper and lower bound comparators and generates a signal indicative of the state of the oscillator.

Abstract: A variable resolution transition placement circuit in an electrophotographic imaging device allows transitions to be placed within a stream of video data so that the pixel resolution achieved over a scan line is adjustable on a pixel by pixel basis using a system clock. Pixel data defines transition positions relative to a synthesized video clock defining pixel time periods. A converter converts positions of the transitions relative to the synthesized video clock to positions relative to the system clock using a value provided by a synthesized video clock to system clock transform generator. The value can change between synthesized video clock cycles to change the pixel resolution. A synthesized video generator generates values of a synthesized video clock relative to the system clock.

Abstract: A system is provided for enabling a pulse width modulator to render video data for a laser at a frequency independent of the operating frequency of the pulse width modulator. The system includes phase measuring circuitry, edge output determining circuitry, edge location circuitry, and a summer. The phase measuring circuitry is operative to detect a phase offset on a scan line for a laser. The edge output determining circuitry is operative to determine which system clock cycle to output an edge on the system clock to act as if it were on a video clock. The edge location circuitry is operative to locate placement of an edge for a given pixel. The summer communicates with the phase measuring circuitry, the edge output determining circuitry, and the edge location circuitry. The summer is operative to combine values from the phase measuring circuitry, the edge output determining circuitry, and the edge location circuitry to generate a desired video signal. A method is also provided.

Abstract: An electrophotographic imaging device uses a transition placement device to position transitions in a stream of video data. A rasterizer included in the electrophotographic imaging device generates pixel data bytes based upon data received from a computer defining an image. A converter generates codes specifying positions of transitions within a pixel time period corresponding to a pixel data byte. The transition placement device includes a phase measuring device to measure a timing offset between an active edge of a beam detect signal and a rising edge of a reference clock. A transition adjustment device adjusts the positions of the transitions specified by the codes relative to the rising edge of the reference clock using the timing offset. Transition generation logic generates the transitions for the stream of video data using the adjusted transition positions received from the transition adjustment device.

Abstract: A system is provided for rendering an output image on an image transfer surface using multiple optical scan paths in an image rendering device. The system includes a plurality of lasers, a plurality of scan time detectors, and processing circuitry. Each of the lasers is configured to generate an optical scan path on the surface. Each scan time detector is associated with a corresponding laser and is operative to measure scan time of the laser along the respective optical scan path. The processing circuitry communicates with each scan time detector and is operative to generate a video signal having a video frequency associated with the scan time detected for the respective laser. A method is also provided.

Abstract: An embodiment of an edge placement device is supplied with transition data to generate transitions during a pixel time period corresponding to the transition data. The transition data is supplied by pulse code logic that converts pixel data to the transition data. The embodiment of an edge placement device includes first edge placement logic coupled to taps from a first clock delay chain and second edge placement logic coupled to taps of a second clock phase delay chain. Also included is a phase splitter that generate a first and a second clock phase coupled, respectively, to the first and the second clock delay chain from a clock corresponding to a pixel time period. The first and the second clock phase have rising edges on alternate cycles of the clock. The first and the second edge placement logic each include a plurality of D flip flops.

Abstract: Pulse width modulation of signals, such as provided to a driver in a laser printer, is phase locked to a beam detect signal. In addition, it must permit continuously variable, arbitrarily small pulses at extremely high speeds. This invention describes a novel method and system using multiple streams of variable phase clocked outputs. The variable phase clocked outputs are combined with a clock generator to achieve these goals at low cost. As a result, the pulse width modulated signals provide continuously variable selectable pulse widths at extremely high speed.

Abstract: A reloading state analyzer for allowing a tree of trigger event sequences to be tracked is presented. The reloading state analyzer provides an input interface for receiving and conditioning input state data. A configuration memory stores configuration structures containing multiple compare terms and associated actions. A tree of configuration structures may be downloaded to the configuration memory from a user interface. The reloading state analyzer compares a plurality of current compare terms with input state data. When the input state data matches one of the current compare terms, an action associated with the matching compare term is executed. The action may be a state collection control action, such as an arm, disarm, trigger, collect or stop collection action, or it may be a reload action. If the action associated with the matching compare term is a reload action, a new set of compare terms are retrieved from the configuration memory and become the current compare terms.

Abstract: An electrophotographic printer includes a photoreceptor on a drum or belt, a laser beam that is reciprocally scanned thereacross, a beam detect signal circuit for generating a beam detect signal and an asynchronous clock oscillator for generating clock pulses. The printer also includes circuitry for generating a plurality of clock signals that are phase synchronized with the beam detect signal. The circuitry includes a tapped delay line for receiving the asynchronous clock pulses, each tap outputting a delayed clock pulse train. A register/selector circuit is coupled to the taps and is responsive to a transition of the beam detect signal for determining a tap which outputs a 0.degree. phase clock transition that is closely proximate to the beam detect signal. Phase delay logic provides signals indicative of which taps of the delay line circuit manifest clock pulse trains that are closest in time to leading and lagging edges of a 0.degree. phase clock pulse, respectively.

Abstract: A system and method of correcting aberrations in an output image of an image transfer apparatus, the aberrations being due to variations in a velocity of a scanning surface in the image transfer apparatus. Specifically, laser printer banding effects are reduced by modifying the gray scale dithering concentration based on a sensed variation of drum rotation velocity. A closed loop feedback system monitors errors in the drum motion and compensates the modulation of the laser to help cancel out the perceivable amount of banding effect in the printed image.

Abstract: A convection oven having an insulated oven chamber bounded by a front access door, a floor, a ceiling, two side walls, and a rear wall. An inlet air passageway, which includes a heating element, delivers heated air to the oven chamber, and an exhaust passageway exhausts air from the oven chamber. A baffle plate spaced from the rear wall divides the oven chamber into a blower compartment and a baking compartment, which are connected by a return air opening in the baffle plate and at least one peripheral opening outwards of the return air opening. A blower fan in the blower compartment draws heated air into the oven chamber, mixes the heated air with air already inside the even chamber, circulates the mixed air throughout the oven chamber, and expels air through the exhaust passageway. To alleviate problems caused by high and low pressure zones created in diagonally opposing corners of the blower compartment by rotation of the blower fan, two pairs of diverter plates are disposed around the blower fan.

Abstract: A propagation-delay-transparent, video-signal interface suitable for use in a laser printer to carry a video signal from a formatter to a laser driver with minimal distortion. The interface includes two transmission paths, one for carrying the video signal produced by the formatter and another for carrying an inverted video signal or complement of the video signal. A differential circuit is included in the interface to determine a difference between the signals transmitted by the two transmission paths so that common-mode noise introduced along the transmission paths is substantially eliminated. The transmission paths include buffers, which restore pulses in the video signal to appropriate digital levels. The differential circuit includes hysteresis circuitry that, in combination with the differential function of the differential circuit, eliminates pulse width distortion of the video signal caused by delays of the buffers.

Abstract: A new and improved method and system for controlling the timing of a modulation input signal utilized for driving a laser engine of a laser or electrophotographic printer. This method and system utilizes a novel modulation generator circuit which operates to receive both a beam detect signal from the laser driver circuit and an asynchronous clock signal from the output of an asynchronous clock generator. The modulation generator in turn operates to delay the output signal from the asynchronous clock generator a predetermined number of times and then select the delayed clock signal which is closest in phase to the phase of the beam detect signal. Then this clock generated signal is used to set the modulation frequency of a bi-phase output digital clock signal from the modulation generator which is applied as input timing signal for video input data applied to laser driver circuit and used for developing images on a photoconductive drum.